/src/sys/arch/arm/footbridge/ |
footbridge_irqhandler.c | 284 int oldirqstate, irq, ibit, hwpend; local in function:footbridge_intr_dispatch 301 ibit = (1U << irq); 303 hwpend &= ~ibit; 305 if (imask & ibit) { 310 footbridge_ipending |= ibit; 314 footbridge_ipending &= ~ibit; 331 intr_enabled |= ibit;
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/src/sys/arch/arm/ixp12x0/ |
ixp12x0_intr.c | 386 uint32_t ibit; local in function:ixp12x0_intr_dispatch 400 ibit = (1U << irq); 410 hwpend &= ~ibit; 415 ibit = (1U << irq); 426 pci_hwpend &= ~ibit;
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/src/sys/arch/arm/xscale/ |
becc_icu.c | 339 uint32_t oldirqstate, irq, ibit, hwpend; local in function:becc_intr_dispatch 355 ibit = (1U << irq); 357 hwpend &= ~ibit; 359 if (imask & ibit) { 364 becc_ipending |= ibit; 368 becc_ipending &= ~ibit; 383 intr_enabled |= ibit;
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i80321_icu.c | 355 int oldirqstate, irq, ibit, hwpend; local in function:i80321_intr_dispatch 384 ibit = (1U << irq); 386 hwpend &= ~ibit; 388 if (imask & ibit) { 406 i80321_ipending |= ibit; 411 oldpending = i80321_ipending | ibit; 413 i80321_ipending &= ~ibit; 444 intr_enabled |= ibit;
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ixp425_intr.c | 389 int oldirqstate, irq, ibit, hwpend; local in function:ixp425_intr_dispatch 405 ibit = (1U << irq); 407 hwpend &= ~ibit; 409 if (imask & ibit) { 414 ixp425_ipending |= ibit; 418 ixp425_ipending &= ~ibit; 425 if ((ibit & IXP425_INT_GPIOMASK) && iq->iq_ist != IST_LEVEL) { 438 if ((ibit & IXP425_INT_GPIOMASK) && iq->iq_ist == IST_LEVEL) { 446 intr_enabled |= ibit;
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/src/sys/arch/evbarm/ifpga/ |
ifpga_intr.c | 301 int oldirqstate, pcpl, irq, ibit, hwpend; local in function:ifpga_intr_dispatch 321 ibit = (1U << irq); 323 hwpend &= ~ibit; 325 if (pcpl & ibit) { 330 ifpga_ipending |= ibit; 334 ifpga_ipending &= ~ibit; 351 intr_enabled |= ibit;
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/src/sys/arch/evbarm/iq80310/ |
iq80310_intr.c | 419 int oldirqstate, pcpl, irq, ibit, hwpend, rv; local in function:iq80310_intr_dispatch 434 ibit = (1U << irq); 440 hwpend &= ~ibit; 442 if (pcpl & ibit) { 448 iq80310_ipending |= ibit; 452 iq80310_ipending &= ~ibit;
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