| /src/external/gpl3/gcc.old/dist/gcc/ |
| optabs-query.h | 117 enum insn_code icode = CODE_FOR_nothing; local
119 icode = convert_optab_handler (vcondu_optab, vmode, cmode);
121 icode = convert_optab_handler (vcond_optab, vmode, cmode);
122 return icode;
151 enum insn_code icode; member in class:extraction_insn
209 enum insn_code icode = find_widening_optab_handler_and_mode local
211 if (icode != CODE_FOR_nothing && found_mode)
213 return icode;
|
| optabs-query.cc | 47 insn_code icode = convert_optab_handler (optab, to_mode, from_mode); local
48 if (icode == CODE_FOR_nothing
51 return icode;
62 insn_code icode = direct_optab_handler (optab, mode); local
63 if (icode == CODE_FOR_nothing
66 return icode;
73 /* Check whether insv, extv or extzv pattern ICODE can be used for an
84 enum insn_code icode,
87 const struct insn_data_d *data = &insn_data[icode];
103 insn->icode = icode
129 enum insn_code icode = direct_optab_handler (optab, mode); local
310 enum insn_code icode; local
[all...] |
| ccmp.cc | 297 insn_code icode; local
304 icode = optab_handler (cstore_optab, cc_mode);
305 if (icode != CODE_FOR_nothing)
312 tmp = emit_cstore (target, icode, cmp_code, cc_mode, cc_mode,
|
| gimple-isel.cc | 126 enum insn_code icode; local
252 icode = get_vcond_icode (mode, cmp_op_mode, unsignedp);
256 if (icode == CODE_FOR_nothing
258 && ((icode = get_vcond_icode (mode, cmp_op_mode, !unsignedp))
261 if (icode == CODE_FOR_nothing)
|
| target.h | 111 /* icode is actually an enum insn_code, but we don't want to force every
113 int icode; member in struct:secondary_reload_info
|
| lra-eliminations.cc | 888 int icode = recog_memoized (insn);
899 if (icode < 0 && asm_noperands (PATTERN (insn)) < 0 && ! DEBUG_INSN_P (insn))
1003 if (icode < 0 || insn_data[icode].operand[i].eliminable)
1340 int icode = recog (PATTERN (insn), insn, 0);
1342 if (icode >= 0 && icode != INSN_CODE (insn))
1349 INSN_CODE (insn) = icode;
886 int icode = recog_memoized (insn); local
1338 int icode = recog (PATTERN (insn), insn, 0); local
|
| lra-int.h | 124 same ICODE). Warning: if the structure definition is changed, the
166 /* Static part (common info for insns with the same ICODE) of LRA
168 non-negative ICODE. There is only one exception. Each asm insn has
206 int icode; member in class:lra_insn_recog_data
216 /* Common data for insns with the same ICODE. Asm insns (their
217 ICODE is negative) do not share such structures. */
491 || data->icode == INSN_CODE (insn)));
|
| tree-affine.cc | 314 enum tree_code icode = TREE_CODE (inner); local
325 if ((icode == PLUS_EXPR || icode == MINUS_EXPR || icode == MULT_EXPR)
338 || (icode == PLUS_EXPR && operand_equal_p (op0, op1, 0))))
342 return expr_to_aff_combination (comb, icode, otype, op0, op1);
360 if (icode == PLUS_EXPR)
362 else if (icode == MULT_EXPR)
371 return expr_to_aff_combination (comb, icode, otype, op0,
|
| explow.cc | 1679 insn_code icode = targetm.code_for_probe_stack_address;
1681 maybe_legitimize_operands (icode, 0, 1, ops);
1682 expand_insn (icode, 1, ops);
1670 insn_code icode = targetm.code_for_probe_stack_address; local
|
| /src/external/gpl3/gcc.old/dist/gcc/config/aarch64/ |
| aarch64-sve-builtins-sve2.cc | 150 insn_code icode = code_for_aarch64_gather_ldnt (extend_rtx_code (), variable
153 return e.use_exact_insn (icode);
403 insn_code icode = code_for_aarch64_scatter_stnt (e.vector_mode (0), variable
405 return e.use_exact_insn (icode);
|
| aarch64-sve-builtins-functions.h | 392 insn_code icode; variable
399 icode = code_for_aarch64_sve (unspec, e.vector_mode (0));
402 icode = INT_CODE (unspec, e.vector_mode (0));
403 return e.use_exact_insn (icode);
427 insn_code icode; variable
434 icode = code_for_aarch64_lane (unspec, e.vector_mode (0));
437 icode = INT_CODE (unspec, e.vector_mode (0));
438 return e.use_exact_insn (icode);
524 insn_code icode = code_for_aarch64_sve (m_unspec, e.vector_mode (0)); variable
525 return e.use_exact_insn (icode);
[all...] |
| aarch64-sve-builtins-base.cc | 102 insn_code icode; local
104 icode = code_for_aarch64_pred_fma (e.vector_mode (0));
106 icode = code_for_aarch64_pred (UNSPEC_COND_FMLA, e.vector_mode (0));
107 return e.use_pred_x_insn (icode);
110 insn_code icode = e.direct_optab_handler (cond_fma_optab); local
111 return e.use_cond_insn (icode, merge_argno);
123 insn_code icode = code_for_aarch64_lane (unspec, e.vector_mode (0)); local
124 return e.use_exact_insn (icode);
135 insn_code icode; local
137 icode = code_for_aarch64_pred_fnma (e.vector_mode (0))
143 insn_code icode = e.direct_optab_handler (cond_fnma_optab); local
157 insn_code icode; variable
185 insn_code icode = code_for_aarch64_pred_fac (m_unspec, e.vector_mode (0)); variable
202 insn_code icode = direct_optab_handler (mask_fold_left_plus_optab, mode); variable
319 insn_code icode; variable
368 insn_code icode = code_for_aarch64_lane (unspec_fcmla (rot), mode); variable
373 insn_code icode = code_for_aarch64_lane (unspec_cmla (rot), mode); variable
424 insn_code icode = code_for_aarch64_pred_fcm (m_unspec_for_fp, mode); variable
457 insn_code icode = code_for_aarch64_pred_cmp (code, mode); variable
657 insn_code icode; variable
721 insn_code icode variable
918 insn_code icode = code_for_aarch64_sve_dupq_lane (mode); variable
996 insn_code icode = code_for_aarch64_pred_sxt (wide_mode, narrow_mode); variable
1000 insn_code icode = code_for_aarch64_cond_sxt (wide_mode, narrow_mode); variable
1065 insn_code icode = direct_optab_handler (vec_shl_insert_optab, variable
1117 insn_code icode = convert_optab_handler (maskload_optab, variable
1133 insn_code icode = code_for_aarch64_load (UNSPEC_LD1_SVE, extend_rtx_code (), variable
1157 insn_code icode = convert_optab_handler (mask_gather_load_optab, variable
1179 insn_code icode = code_for_aarch64_gather_load (extend_rtx_code (), variable
1214 insn_code icode = code_for_aarch64_sve_ld1rq (e.vector_mode (0)); variable
1231 insn_code icode = code_for_aarch64_sve_ld1ro (e.vector_mode (0)); variable
1288 insn_code icode = convert_optab_handler (vec_mask_load_lanes_optab, variable
1339 insn_code icode = code_for_aarch64_ldff1_gather (extend_rtx_code (), variable
1358 insn_code icode = code_for_aarch64_ldnt1 (e.vector_mode (0)); variable
1410 insn_code icode = code_for_aarch64_ldf1 (m_unspec, extend_rtx_code (), variable
1535 insn_code icode; variable
1662 insn_code icode = code_for_aarch64_sve_prefetch (m_mode); variable
1700 insn_code icode = code_for_aarch64_sve_gather_prefetch (m_mode, reg_mode); variable
1892 insn_code icode; variable
2010 insn_code icode = convert_optab_handler (vcond_mask_optab, variable
2117 insn_code icode = convert_optab_handler (maskstore_optab, variable
2140 insn_code icode = convert_optab_handler (mask_scatter_store_optab, variable
2160 insn_code icode = code_for_aarch64_scatter_store_trunc variable
2176 insn_code icode = code_for_aarch64_store_trunc (e.memory_vector_mode (), variable
2221 insn_code icode = convert_optab_handler (vec_mask_store_lanes_optab, variable
2239 insn_code icode = code_for_aarch64_stnt1 (e.vector_mode (0)); variable
2341 insn_code icode; variable
2376 insn_code icode = code_for_dot_prod (UNSPEC_USDOT, mode); variable
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/riscv/ |
| riscv-builtins.cc | 74 enum insn_code icode; member in struct:riscv_builtin_description
185 riscv_builtin_decl_index[d->icode] = i;
214 /* Expand instruction ICODE as part of a built-in function sequence.
222 riscv_expand_builtin_insn (enum insn_code icode, unsigned int n_ops,
225 if (!maybe_expand_insn (icode, n_ops, ops))
236 and ICODE is the code of the associated .md pattern. TARGET, if nonnull,
240 riscv_expand_builtin_direct (enum insn_code icode, rtx target, tree exp,
252 == insn_data[icode].n_generator_args);
256 return riscv_expand_builtin_insn (icode, opno, ops, has_target_p);
273 return riscv_expand_builtin_direct (d->icode, target, exp, true)
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/d/ |
| intrinsics.cc | 632 internal_fn icode; local
644 icode = IFN_ADD_OVERFLOW;
654 icode = IFN_SUB_OVERFLOW;
665 icode = IFN_MUL_OVERFLOW;
674 icode = IFN_SUB_OVERFLOW;
682 = build_call_expr_internal_loc (EXPR_LOCATION (callexp), icode,
|
| /src/sys/dev/ic/ |
| oosiop.c | 1159 uint32_t icode; local
1165 icode = oosiop_read_4(sc, OOSIOP_DSPS);
1167 switch (icode) {
1263 device_xname(sc->sc_dev), icode);
|
| /src/external/gpl3/gcc.old/dist/gcc/config/loongarch/ |
| loongarch-builtins.cc | 87 enum insn_code icode; member in struct:loongarch_builtin_description
270 loongarch_get_builtin_decl_index[d->icode] = i;
300 /* Expand instruction ICODE as part of a built-in function sequence.
308 loongarch_expand_builtin_insn (enum insn_code icode, unsigned int nops,
311 if (!maybe_expand_insn (icode, nops, ops))
321 and ICODE is the code of the associated .md pattern. TARGET, if nonnull,
325 loongarch_expand_builtin_direct (enum insn_code icode, rtx target, tree exp,
338 == insn_data[icode].n_generator_args);
342 return loongarch_expand_builtin_insn (icode, opno, ops, has_target_p);
365 return loongarch_expand_builtin_direct (d->icode, target, exp, true)
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/nds32/ |
| nds32-intrinsic.cc | 53 /* Return a legitimate rtx for instruction ICODE's return value. Use TARGET
57 nds32_legitimize_target (enum insn_code icode, rtx target)
59 enum machine_mode mode = insn_data[icode].operand[0].mode;
63 || ! (*insn_data[icode].operand[0].predicate) (target, mode))
69 /* Given that ARG is being passed as operand OPNUM to instruction ICODE,
74 nds32_legitimize_argument (enum insn_code icode, int opnum, rtx arg)
76 enum machine_mode mode = insn_data[icode].operand[opnum].mode;
78 if ((*insn_data[icode].operand[opnum].predicate) (arg, mode))
117 /* Return true if OPVAL can be used for operand OPNUM of instruction ICODE.
121 nds32_check_constant_argument (enum insn_code icode, int opnum, rtx opval
503 const enum insn_code icode; member in struct:builtin_description
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/rtl-ssa/ |
| changes.cc | 776 int icode = -1; local
803 icode = ::recog (pat, rtl, &num_clobbers);
804 if (icode < 0)
840 add_clobbers (newpat, icode);
854 INSN_CODE (rtl) = icode;
864 else if (const char *name = get_insn_name (icode))
881 if (!asm_p && (name = get_insn_name (icode)))
|
| /src/sys/arch/sgimips/dev/ |
| scnvar.h | 94 u_char icode, ocode; member in struct:duart::chan
|
| /src/external/bsd/libpcap/dist/ |
| gencode.h | 396 struct icode { struct
401 int bpf_optimize(struct icode *, char *);
408 struct bpf_insn *icode_to_fcode(struct icode *, struct block *, u_int *,
|
| /src/external/gpl3/gcc.old/dist/gcc/config/i386/ |
| i386-builtins.cc | 212 enum ix86_builtin_func_type icode; local
214 icode = ix86_builtin_func_alias_base[index];
215 type = ix86_get_builtin_func_type (icode);
|
| /src/external/gpl3/gcc.old/dist/gcc/config/spu/ |
| spu.h | 535 int icode;
507 int icode; member in struct:spu_builtin_description
|
| /src/external/bsd/ipf/dist/tools/ |
| ipf_y.y | 1276 icmp: | itype icode
1313 icode: | seticmpcode icmpcode label
|
| /src/external/gpl3/binutils/dist/bfd/ |
| elf32-rx.c | 2868 int dcode, icode, reg, ioff, dscale, ilen;
2878 icode = (insn[1] >> 2) & 0x03;
2932 switch (icode)
2977 switch (icode)
2865 int dcode, icode, reg, ioff, dscale, ilen; local
|
| /src/external/gpl3/binutils.old/dist/bfd/ |
| elf32-rx.c | 2869 int dcode, icode, reg, ioff, dscale, ilen;
2879 icode = (insn[1] >> 2) & 0x03;
2933 switch (icode)
2978 switch (icode)
2866 int dcode, icode, reg, ioff, dscale, ilen; local
|
