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      1 /*	$NetBSD: intr.h,v 1.66 2022/09/07 00:40:18 knakahara Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1998, 2001, 2006, 2007, 2008, 2019 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Charles M. Hannum, and by Jason R. Thorpe.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #ifndef _X86_INTR_H_
     33 #define _X86_INTR_H_
     34 
     35 #define	__HAVE_FAST_SOFTINTS
     36 #if !defined(NO_PREEMPTION)
     37 #define	__HAVE_PREEMPTION
     38 #endif /* !defined(NO_PREEMPTION) */
     39 
     40 #ifdef _KERNEL
     41 #include <sys/types.h>
     42 #include <sys/kcpuset.h>
     43 #else
     44 #include <stdbool.h>
     45 #endif
     46 
     47 #include <sys/evcnt.h>
     48 #include <sys/queue.h>
     49 #include <machine/intrdefs.h>
     50 
     51 #ifdef XEN
     52 #include <xen/include/public/xen.h>
     53 #include <xen/include/public/event_channel.h>
     54 #endif /* XEN */
     55 
     56 #ifndef _LOCORE
     57 #include <machine/pic.h>
     58 
     59 /*
     60  * Struct describing an interrupt source for a CPU. struct cpu_info
     61  * has an array of MAX_INTR_SOURCES of these. The index in the array
     62  * is equal to the stub number of the stubcode as present in vector.s
     63  *
     64  * The primary CPU's array of interrupt sources has its first 16
     65  * entries reserved for legacy ISA irq handlers. This means that
     66  * they have a 1:1 mapping for arrayindex:irq_num. This is not
     67  * true for interrupts that come in through IO APICs, to find
     68  * their source, go through ci->ci_isources[index].is_pic
     69  *
     70  * It's possible to always maintain a 1:1 mapping, but that means
     71  * limiting the total number of interrupt sources to MAX_INTR_SOURCES
     72  * (32), instead of 32 per CPU. It also would mean that having multiple
     73  * IO APICs which deliver interrupts from an equal pin number would
     74  * overlap if they were to be sent to the same CPU.
     75  */
     76 
     77 struct intrstub {
     78 	void *ist_entry;
     79 	void *ist_recurse;
     80 	void *ist_resume;
     81 };
     82 
     83 struct percpu_evcnt {
     84 	cpuid_t cpuid;
     85 	uint64_t count;
     86 };
     87 
     88 struct intrsource {
     89 	int is_maxlevel;		/* max. IPL for this source */
     90 	int is_pin;			/* IRQ for legacy; pin for IO APIC,
     91 					   -1 for MSI */
     92 	struct intrhand *is_handlers;	/* handler chain */
     93 	struct pic *is_pic;		/* originating PIC */
     94 	void *is_recurse;		/* entry for spllower */
     95 	void *is_resume;		/* entry for doreti */
     96 	lwp_t *is_lwp;			/* for soft interrupts */
     97 #if defined(XEN)
     98 	u_long ipl_evt_mask1;	/* pending events for this IPL */
     99 	u_long ipl_evt_mask2[NR_EVENT_CHANNELS];
    100 #endif
    101 	struct evcnt is_evcnt;		/* interrupt counter per cpu */
    102 	/*
    103 	 * is_mask_count requires special handling; it can only be modified
    104 	 * or examined on the CPU that owns the interrupt source, and such
    105 	 * references need to be protected by disabling interrupts.  This
    106 	 * is because intr_mask() can be called from an interrupt handler.
    107 	 * is_distribute_pending does not require such special handling
    108 	 * because intr_unmask() cannot be called from an interrupt handler.
    109 	 */
    110 	u_int is_mask_count;		/* masked? (nested) [see above] */
    111 	int is_distribute_pending;	/* ci<->ci move pending [cpu_lock] */
    112 	int is_flags;			/* see below */
    113 	int is_type;			/* level, edge */
    114 	int is_idtvec;
    115 	int is_minlevel;
    116 	char is_evname[32];		/* event counter name */
    117 	char is_intrid[INTRIDBUF];	/* intrid created by create_intrid() */
    118 	char is_xname[INTRDEVNAMEBUF];	/* device names */
    119 	cpuid_t is_active_cpu;		/* active cpuid */
    120 	struct percpu_evcnt *is_saved_evcnt;	/* interrupt count of deactivated cpus */
    121 	SIMPLEQ_ENTRY(intrsource) is_list;	/* link of intrsources */
    122 };
    123 
    124 #define IS_LEGACY	0x0001		/* legacy ISA irq source */
    125 #define IS_IPI		0x0002
    126 #define IS_LOG		0x0004
    127 
    128 /*
    129  * Interrupt handler chains.  *_intr_establish() insert a handler into
    130  * the list.  The handler is called with its (single) argument.
    131  */
    132 
    133 struct intrhand {
    134 	struct pic *ih_pic;
    135 	int	(*ih_fun)(void *);
    136 	void	*ih_arg;
    137 	int	ih_level;
    138 	int	(*ih_realfun)(void *);
    139 	void	*ih_realarg;
    140 	struct	intrhand *ih_next;
    141 	struct	intrhand **ih_prevp;
    142 	int	ih_pin;
    143 	int	ih_slot;
    144 #if defined(XEN)
    145 	int	ih_pending;
    146 	struct	intrhand *ih_evt_next;
    147 #endif
    148 	struct cpu_info *ih_cpu;
    149 	char	ih_xname[INTRDEVNAMEBUF];
    150 };
    151 
    152 #ifdef _KERNEL
    153 
    154 void Xspllower(int);
    155 void spllower(int);
    156 int splraise(int);
    157 void softintr(int);
    158 
    159 /*
    160  * Convert spl level to local APIC level
    161  */
    162 
    163 #define APIC_LEVEL(l)   ((l) << 4)
    164 
    165 /*
    166  * Miscellaneous
    167  */
    168 
    169 #define SPL_ASSERT_BELOW(x) KDASSERT(curcpu()->ci_ilevel < (x))
    170 #define	spl0()		spllower(IPL_NONE)
    171 #define	splx(x)		spllower(x)
    172 
    173 typedef uint8_t ipl_t;
    174 typedef struct {
    175 	ipl_t _ipl;
    176 } ipl_cookie_t;
    177 
    178 static inline ipl_cookie_t
    179 makeiplcookie(ipl_t ipl)
    180 {
    181 
    182 	return (ipl_cookie_t){._ipl = ipl};
    183 }
    184 
    185 static inline int
    186 splraiseipl(ipl_cookie_t icookie)
    187 {
    188 
    189 	return splraise(icookie._ipl);
    190 }
    191 
    192 #include <sys/spl.h>
    193 
    194 /*
    195  * Stub declarations.
    196  */
    197 
    198 void Xsoftintr(void);
    199 void Xrecurse_preempt(void);
    200 void Xresume_preempt(void);
    201 
    202 extern struct intrstub legacy_stubs[];
    203 extern struct intrstub ioapic_edge_stubs[];
    204 extern struct intrstub ioapic_level_stubs[];
    205 extern struct intrstub x2apic_edge_stubs[];
    206 extern struct intrstub x2apic_level_stubs[];
    207 
    208 struct cpu_info;
    209 
    210 struct pcibus_attach_args;
    211 
    212 typedef uint64_t intr_handle_t;
    213 
    214 void intr_default_setup(void);
    215 void x86_nmi(void);
    216 void *intr_establish_xname(int, struct pic *, int, int, int, int (*)(void *),
    217 			   void *, bool, const char *);
    218 void *intr_establish(int, struct pic *, int, int, int, int (*)(void *), void *, bool);
    219 void intr_mask(struct intrhand *);
    220 void intr_unmask(struct intrhand *);
    221 void intr_disestablish(struct intrhand *);
    222 void intr_add_pcibus(struct pcibus_attach_args *);
    223 const char *intr_string(intr_handle_t, char *, size_t);
    224 void cpu_intr_init(struct cpu_info *);
    225 int intr_find_mpmapping(int, int, intr_handle_t *);
    226 struct pic *intr_findpic(int);
    227 void intr_printconfig(void);
    228 
    229 const char *intr_create_intrid(int, struct pic *, int, char *, size_t);
    230 struct intrsource *intr_allocate_io_intrsource(const char *);
    231 void intr_free_io_intrsource(const char *);
    232 
    233 void x86_init_preempt(struct cpu_info *);
    234 void x86_intr_calculatemasks(struct cpu_info *);
    235 
    236 int x86_send_ipi(struct cpu_info *, int);
    237 void x86_broadcast_ipi(int);
    238 void x86_ipi_handler(void);
    239 
    240 void x86_intr_get_devname(const char *, char *, size_t);
    241 void x86_intr_get_assigned(const char *, kcpuset_t *);
    242 uint64_t x86_intr_get_count(const char *, u_int);
    243 
    244 #ifndef XENPV
    245 extern void (* const ipifunc[X86_NIPI])(struct cpu_info *);
    246 #endif
    247 
    248 #endif /* _KERNEL */
    249 
    250 #endif /* !_LOCORE */
    251 
    252 #endif /* !_X86_INTR_H_ */
    253