/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
amdgpu_umc.c | 146 struct ras_dispatch_if ih_data = { local in function:amdgpu_umc_process_ecc_irq 153 ih_data.head = *ras_if; 155 amdgpu_ras_interrupt_dispatch(adev, &ih_data);
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amdgpu_sdma.c | 178 struct ras_dispatch_if ih_data = { local in function:amdgpu_sdma_process_ecc_irq 185 ih_data.head = *ras_if; 187 amdgpu_ras_interrupt_dispatch(adev, &ih_data);
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amdgpu_gfx.c | 654 struct ras_dispatch_if ih_data = { local in function:amdgpu_gfx_cp_ecc_error_irq 661 ih_data.head = *ras_if; 664 amdgpu_ras_interrupt_dispatch(adev, &ih_data);
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amdgpu_gfx.h | 213 unsigned ih_data; member in struct:sq_work
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amdgpu_ras.h | 407 struct ras_ih_data ih_data; member in struct:ras_manager
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amdgpu_gfx_v8_0.c | 6785 static void gfx_v8_0_parse_sq_irq(struct amdgpu_device *adev, unsigned ih_data) 6791 enc = REG_GET_FIELD(ih_data, SQ_INTERRUPT_WORD_CMN, ENCODING); 6792 se_id = REG_GET_FIELD(ih_data, SQ_INTERRUPT_WORD_CMN, SE_ID); 6802 REG_GET_FIELD(ih_data, SQ_INTERRUPT_WORD_AUTO, IMMED_OVERFLOW), 6803 REG_GET_FIELD(ih_data, SQ_INTERRUPT_WORD_AUTO, HOST_REG_OVERFLOW), 6804 REG_GET_FIELD(ih_data, SQ_INTERRUPT_WORD_AUTO, HOST_CMD_OVERFLOW), 6805 REG_GET_FIELD(ih_data, SQ_INTERRUPT_WORD_AUTO, CMD_TIMESTAMP), 6806 REG_GET_FIELD(ih_data, SQ_INTERRUPT_WORD_AUTO, REG_TIMESTAMP), 6807 REG_GET_FIELD(ih_data, SQ_INTERRUPT_WORD_AUTO, THREAD_TRACE_BUF_FULL), 6808 REG_GET_FIELD(ih_data, SQ_INTERRUPT_WORD_AUTO, WLT) 6868 unsigned ih_data = entry->src_data[0]; local in function:gfx_v8_0_sq_irq [all...] |