1 /* $NetBSD: intel_dp_mst.c,v 1.2 2021/12/18 23:45:30 riastradh Exp $ */ 2 3 /* 4 * Copyright 2008 Intel Corporation 5 * 2014 Red Hat Inc. 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a 8 * copy of this software and associated documentation files (the "Software"), 9 * to deal in the Software without restriction, including without limitation 10 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 11 * and/or sell copies of the Software, and to permit persons to whom the 12 * Software is furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the next 15 * paragraph) shall be included in all copies or substantial portions of the 16 * Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 24 * IN THE SOFTWARE. 25 * 26 */ 27 28 #include <sys/cdefs.h> 29 __KERNEL_RCSID(0, "$NetBSD: intel_dp_mst.c,v 1.2 2021/12/18 23:45:30 riastradh Exp $"); 30 31 #include <drm/drm_atomic_helper.h> 32 #include <drm/drm_edid.h> 33 #include <drm/drm_probe_helper.h> 34 35 #include "i915_drv.h" 36 #include "intel_atomic.h" 37 #include "intel_audio.h" 38 #include "intel_connector.h" 39 #include "intel_ddi.h" 40 #include "intel_display_types.h" 41 #include "intel_dp.h" 42 #include "intel_dp_mst.h" 43 #include "intel_dpio_phy.h" 44 45 static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder, 46 struct intel_crtc_state *crtc_state, 47 struct drm_connector_state *conn_state, 48 struct link_config_limits *limits) 49 { 50 struct drm_atomic_state *state = crtc_state->uapi.state; 51 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 52 struct intel_dp *intel_dp = &intel_mst->primary->dp; 53 struct intel_connector *connector = 54 to_intel_connector(conn_state->connector); 55 const struct drm_display_mode *adjusted_mode = 56 &crtc_state->hw.adjusted_mode; 57 void *port = connector->port; 58 bool constant_n = drm_dp_has_quirk(&intel_dp->desc, 59 DP_DPCD_QUIRK_CONSTANT_N); 60 int bpp, slots = -EINVAL; 61 62 crtc_state->lane_count = limits->max_lane_count; 63 crtc_state->port_clock = limits->max_clock; 64 65 for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) { 66 crtc_state->pipe_bpp = bpp; 67 68 crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, 69 crtc_state->pipe_bpp, 70 false); 71 72 slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr, 73 port, crtc_state->pbn, 0); 74 if (slots == -EDEADLK) 75 return slots; 76 if (slots >= 0) 77 break; 78 } 79 80 if (slots < 0) { 81 DRM_DEBUG_KMS("failed finding vcpi slots:%d\n", slots); 82 return slots; 83 } 84 85 intel_link_compute_m_n(crtc_state->pipe_bpp, 86 crtc_state->lane_count, 87 adjusted_mode->crtc_clock, 88 crtc_state->port_clock, 89 &crtc_state->dp_m_n, 90 constant_n, crtc_state->fec_enable); 91 crtc_state->dp_m_n.tu = slots; 92 93 return 0; 94 } 95 96 /* 97 * Iterate over all connectors and return the smallest transcoder in the MST 98 * stream 99 */ 100 static enum transcoder 101 intel_dp_mst_master_trans_compute(struct intel_atomic_state *state, 102 struct intel_dp *mst_port) 103 { 104 struct drm_i915_private *dev_priv = to_i915(state->base.dev); 105 struct intel_digital_connector_state *conn_state; 106 struct intel_connector *connector; 107 enum pipe ret = I915_MAX_PIPES; 108 int i; 109 110 if (INTEL_GEN(dev_priv) < 12) 111 return INVALID_TRANSCODER; 112 113 for_each_new_intel_connector_in_state(state, connector, conn_state, i) { 114 struct intel_crtc_state *crtc_state; 115 struct intel_crtc *crtc; 116 117 if (connector->mst_port != mst_port || !conn_state->base.crtc) 118 continue; 119 120 crtc = to_intel_crtc(conn_state->base.crtc); 121 crtc_state = intel_atomic_get_new_crtc_state(state, crtc); 122 if (!crtc_state->uapi.active) 123 continue; 124 125 /* 126 * Using crtc->pipe because crtc_state->cpu_transcoder is 127 * computed, so others CRTCs could have non-computed 128 * cpu_transcoder 129 */ 130 if (crtc->pipe < ret) 131 ret = crtc->pipe; 132 } 133 134 if (ret == I915_MAX_PIPES) 135 return INVALID_TRANSCODER; 136 137 /* Simple cast works because TGL don't have a eDP transcoder */ 138 return (enum transcoder)ret; 139 } 140 141 static int intel_dp_mst_compute_config(struct intel_encoder *encoder, 142 struct intel_crtc_state *pipe_config, 143 struct drm_connector_state *conn_state) 144 { 145 struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state); 146 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 147 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 148 struct intel_dp *intel_dp = &intel_mst->primary->dp; 149 struct intel_connector *connector = 150 to_intel_connector(conn_state->connector); 151 struct intel_digital_connector_state *intel_conn_state = 152 to_intel_digital_connector_state(conn_state); 153 const struct drm_display_mode *adjusted_mode = 154 &pipe_config->hw.adjusted_mode; 155 void *port = connector->port; 156 struct link_config_limits limits; 157 int ret; 158 159 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) 160 return -EINVAL; 161 162 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; 163 pipe_config->has_pch_encoder = false; 164 165 if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO) 166 pipe_config->has_audio = 167 drm_dp_mst_port_has_audio(&intel_dp->mst_mgr, port); 168 else 169 pipe_config->has_audio = 170 intel_conn_state->force_audio == HDMI_AUDIO_ON; 171 172 /* 173 * for MST we always configure max link bw - the spec doesn't 174 * seem to suggest we should do otherwise. 175 */ 176 limits.min_clock = 177 limits.max_clock = intel_dp_max_link_rate(intel_dp); 178 179 limits.min_lane_count = 180 limits.max_lane_count = intel_dp_max_lane_count(intel_dp); 181 182 limits.min_bpp = intel_dp_min_bpp(pipe_config); 183 /* 184 * FIXME: If all the streams can't fit into the link with 185 * their current pipe_bpp we should reduce pipe_bpp across 186 * the board until things start to fit. Until then we 187 * limit to <= 8bpc since that's what was hardcoded for all 188 * MST streams previously. This hack should be removed once 189 * we have the proper retry logic in place. 190 */ 191 limits.max_bpp = min(pipe_config->pipe_bpp, 24); 192 193 intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits); 194 195 ret = intel_dp_mst_compute_link_config(encoder, pipe_config, 196 conn_state, &limits); 197 if (ret) 198 return ret; 199 200 pipe_config->limited_color_range = 201 intel_dp_limited_color_range(pipe_config, conn_state); 202 203 if (IS_GEN9_LP(dev_priv)) 204 pipe_config->lane_lat_optim_mask = 205 bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config->lane_count); 206 207 intel_ddi_compute_min_voltage_level(dev_priv, pipe_config); 208 209 pipe_config->mst_master_transcoder = intel_dp_mst_master_trans_compute(state, intel_dp); 210 211 return 0; 212 } 213 214 /* 215 * If one of the connectors in a MST stream needs a modeset, mark all CRTCs 216 * that shares the same MST stream as mode changed, 217 * intel_modeset_pipe_config()+intel_crtc_check_fastset() will take care to do 218 * a fastset when possible. 219 */ 220 static int 221 intel_dp_mst_atomic_master_trans_check(struct intel_connector *connector, 222 struct intel_atomic_state *state) 223 { 224 struct drm_i915_private *dev_priv = to_i915(state->base.dev); 225 struct drm_connector_list_iter connector_list_iter; 226 struct intel_connector *connector_iter; 227 228 if (INTEL_GEN(dev_priv) < 12) 229 return 0; 230 231 if (!intel_connector_needs_modeset(state, &connector->base)) 232 return 0; 233 234 drm_connector_list_iter_begin(&dev_priv->drm, &connector_list_iter); 235 for_each_intel_connector_iter(connector_iter, &connector_list_iter) { 236 struct intel_digital_connector_state *conn_iter_state; 237 struct intel_crtc_state *crtc_state; 238 struct intel_crtc *crtc; 239 int ret; 240 241 if (connector_iter->mst_port != connector->mst_port || 242 connector_iter == connector) 243 continue; 244 245 conn_iter_state = intel_atomic_get_digital_connector_state(state, 246 connector_iter); 247 if (IS_ERR(conn_iter_state)) { 248 drm_connector_list_iter_end(&connector_list_iter); 249 return PTR_ERR(conn_iter_state); 250 } 251 252 if (!conn_iter_state->base.crtc) 253 continue; 254 255 crtc = to_intel_crtc(conn_iter_state->base.crtc); 256 crtc_state = intel_atomic_get_crtc_state(&state->base, crtc); 257 if (IS_ERR(crtc_state)) { 258 drm_connector_list_iter_end(&connector_list_iter); 259 return PTR_ERR(crtc_state); 260 } 261 262 ret = drm_atomic_add_affected_planes(&state->base, &crtc->base); 263 if (ret) { 264 drm_connector_list_iter_end(&connector_list_iter); 265 return ret; 266 } 267 crtc_state->uapi.mode_changed = true; 268 } 269 drm_connector_list_iter_end(&connector_list_iter); 270 271 return 0; 272 } 273 274 static int 275 intel_dp_mst_atomic_check(struct drm_connector *connector, 276 struct drm_atomic_state *_state) 277 { 278 struct intel_atomic_state *state = to_intel_atomic_state(_state); 279 struct drm_connector_state *new_conn_state = 280 drm_atomic_get_new_connector_state(&state->base, connector); 281 struct drm_connector_state *old_conn_state = 282 drm_atomic_get_old_connector_state(&state->base, connector); 283 struct intel_connector *intel_connector = 284 to_intel_connector(connector); 285 struct drm_crtc *new_crtc = new_conn_state->crtc; 286 struct drm_dp_mst_topology_mgr *mgr; 287 int ret; 288 289 ret = intel_digital_connector_atomic_check(connector, &state->base); 290 if (ret) 291 return ret; 292 293 ret = intel_dp_mst_atomic_master_trans_check(intel_connector, state); 294 if (ret) 295 return ret; 296 297 if (!old_conn_state->crtc) 298 return 0; 299 300 /* We only want to free VCPI if this state disables the CRTC on this 301 * connector 302 */ 303 if (new_crtc) { 304 struct intel_crtc *intel_crtc = to_intel_crtc(new_crtc); 305 struct intel_crtc_state *crtc_state = 306 intel_atomic_get_new_crtc_state(state, intel_crtc); 307 308 if (!crtc_state || 309 !drm_atomic_crtc_needs_modeset(&crtc_state->uapi) || 310 crtc_state->uapi.enable) 311 return 0; 312 } 313 314 mgr = &enc_to_mst(to_intel_encoder(old_conn_state->best_encoder))->primary->dp.mst_mgr; 315 ret = drm_dp_atomic_release_vcpi_slots(&state->base, mgr, 316 intel_connector->port); 317 318 return ret; 319 } 320 321 static void intel_mst_disable_dp(struct intel_encoder *encoder, 322 const struct intel_crtc_state *old_crtc_state, 323 const struct drm_connector_state *old_conn_state) 324 { 325 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 326 struct intel_digital_port *intel_dig_port = intel_mst->primary; 327 struct intel_dp *intel_dp = &intel_dig_port->dp; 328 struct intel_connector *connector = 329 to_intel_connector(old_conn_state->connector); 330 int ret; 331 332 DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links); 333 334 drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port); 335 336 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); 337 if (ret) { 338 DRM_DEBUG_KMS("failed to update payload %d\n", ret); 339 } 340 if (old_crtc_state->has_audio) 341 intel_audio_codec_disable(encoder, 342 old_crtc_state, old_conn_state); 343 } 344 345 static void intel_mst_post_disable_dp(struct intel_encoder *encoder, 346 const struct intel_crtc_state *old_crtc_state, 347 const struct drm_connector_state *old_conn_state) 348 { 349 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 350 struct intel_digital_port *intel_dig_port = intel_mst->primary; 351 struct intel_dp *intel_dp = &intel_dig_port->dp; 352 struct intel_connector *connector = 353 to_intel_connector(old_conn_state->connector); 354 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 355 bool last_mst_stream; 356 u32 val; 357 358 intel_dp->active_mst_links--; 359 last_mst_stream = intel_dp->active_mst_links == 0; 360 WARN_ON(INTEL_GEN(dev_priv) >= 12 && last_mst_stream && 361 !intel_dp_mst_is_master_trans(old_crtc_state)); 362 363 intel_crtc_vblank_off(old_crtc_state); 364 365 intel_disable_pipe(old_crtc_state); 366 367 drm_dp_update_payload_part2(&intel_dp->mst_mgr); 368 369 val = I915_READ(TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder)); 370 val &= ~TRANS_DDI_DP_VC_PAYLOAD_ALLOC; 371 I915_WRITE(TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder), val); 372 373 if (intel_de_wait_for_set(dev_priv, intel_dp->regs.dp_tp_status, 374 DP_TP_STATUS_ACT_SENT, 1)) 375 DRM_ERROR("Timed out waiting for ACT sent when disabling\n"); 376 drm_dp_check_act_status(&intel_dp->mst_mgr); 377 378 drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, connector->port); 379 380 intel_ddi_disable_transcoder_func(old_crtc_state); 381 382 if (INTEL_GEN(dev_priv) >= 9) 383 skl_scaler_disable(old_crtc_state); 384 else 385 ilk_pfit_disable(old_crtc_state); 386 387 /* 388 * Power down mst path before disabling the port, otherwise we end 389 * up getting interrupts from the sink upon detecting link loss. 390 */ 391 drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, 392 false); 393 /* 394 * From TGL spec: "If multi-stream slave transcoder: Configure 395 * Transcoder Clock Select to direct no clock to the transcoder" 396 * 397 * From older GENs spec: "Configure Transcoder Clock Select to direct 398 * no clock to the transcoder" 399 */ 400 if (INTEL_GEN(dev_priv) < 12 || !last_mst_stream) 401 intel_ddi_disable_pipe_clock(old_crtc_state); 402 403 404 intel_mst->connector = NULL; 405 if (last_mst_stream) 406 intel_dig_port->base.post_disable(&intel_dig_port->base, 407 old_crtc_state, NULL); 408 409 DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links); 410 } 411 412 static void intel_mst_pre_pll_enable_dp(struct intel_encoder *encoder, 413 const struct intel_crtc_state *pipe_config, 414 const struct drm_connector_state *conn_state) 415 { 416 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 417 struct intel_digital_port *intel_dig_port = intel_mst->primary; 418 struct intel_dp *intel_dp = &intel_dig_port->dp; 419 420 if (intel_dp->active_mst_links == 0) 421 intel_dig_port->base.pre_pll_enable(&intel_dig_port->base, 422 pipe_config, NULL); 423 } 424 425 static void intel_mst_pre_enable_dp(struct intel_encoder *encoder, 426 const struct intel_crtc_state *pipe_config, 427 const struct drm_connector_state *conn_state) 428 { 429 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 430 struct intel_digital_port *intel_dig_port = intel_mst->primary; 431 struct intel_dp *intel_dp = &intel_dig_port->dp; 432 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 433 struct intel_connector *connector = 434 to_intel_connector(conn_state->connector); 435 int ret; 436 u32 temp; 437 bool first_mst_stream; 438 439 /* MST encoders are bound to a crtc, not to a connector, 440 * force the mapping here for get_hw_state. 441 */ 442 connector->encoder = encoder; 443 intel_mst->connector = connector; 444 first_mst_stream = intel_dp->active_mst_links == 0; 445 WARN_ON(INTEL_GEN(dev_priv) >= 12 && first_mst_stream && 446 !intel_dp_mst_is_master_trans(pipe_config)); 447 448 DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links); 449 450 if (first_mst_stream) 451 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); 452 453 drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true); 454 455 if (first_mst_stream) 456 intel_dig_port->base.pre_enable(&intel_dig_port->base, 457 pipe_config, NULL); 458 459 ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr, 460 connector->port, 461 pipe_config->pbn, 462 pipe_config->dp_m_n.tu); 463 if (!ret) 464 DRM_ERROR("failed to allocate vcpi\n"); 465 466 intel_dp->active_mst_links++; 467 temp = I915_READ(intel_dp->regs.dp_tp_status); 468 I915_WRITE(intel_dp->regs.dp_tp_status, temp); 469 470 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); 471 472 /* 473 * Before Gen 12 this is not done as part of 474 * intel_dig_port->base.pre_enable() and should be done here. For 475 * Gen 12+ the step in which this should be done is different for the 476 * first MST stream, so it's done on the DDI for the first stream and 477 * here for the following ones. 478 */ 479 if (INTEL_GEN(dev_priv) < 12 || !first_mst_stream) 480 intel_ddi_enable_pipe_clock(pipe_config); 481 482 intel_ddi_set_dp_msa(pipe_config, conn_state); 483 } 484 485 static void intel_mst_enable_dp(struct intel_encoder *encoder, 486 const struct intel_crtc_state *pipe_config, 487 const struct drm_connector_state *conn_state) 488 { 489 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 490 struct intel_digital_port *intel_dig_port = intel_mst->primary; 491 struct intel_dp *intel_dp = &intel_dig_port->dp; 492 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 493 494 DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links); 495 496 if (intel_de_wait_for_set(dev_priv, intel_dp->regs.dp_tp_status, 497 DP_TP_STATUS_ACT_SENT, 1)) 498 DRM_ERROR("Timed out waiting for ACT sent\n"); 499 500 drm_dp_check_act_status(&intel_dp->mst_mgr); 501 502 drm_dp_update_payload_part2(&intel_dp->mst_mgr); 503 if (pipe_config->has_audio) 504 intel_audio_codec_enable(encoder, pipe_config, conn_state); 505 } 506 507 static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder, 508 enum pipe *pipe) 509 { 510 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 511 *pipe = intel_mst->pipe; 512 if (intel_mst->connector) 513 return true; 514 return false; 515 } 516 517 static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder, 518 struct intel_crtc_state *pipe_config) 519 { 520 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 521 struct intel_digital_port *intel_dig_port = intel_mst->primary; 522 523 intel_ddi_get_config(&intel_dig_port->base, pipe_config); 524 } 525 526 static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector) 527 { 528 struct intel_connector *intel_connector = to_intel_connector(connector); 529 struct intel_dp *intel_dp = intel_connector->mst_port; 530 struct edid *edid; 531 int ret; 532 533 if (drm_connector_is_unregistered(connector)) 534 return intel_connector_update_modes(connector, NULL); 535 536 edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port); 537 ret = intel_connector_update_modes(connector, edid); 538 kfree(edid); 539 540 return ret; 541 } 542 543 static const struct drm_connector_funcs intel_dp_mst_connector_funcs = { 544 .fill_modes = drm_helper_probe_single_connector_modes, 545 .atomic_get_property = intel_digital_connector_atomic_get_property, 546 .atomic_set_property = intel_digital_connector_atomic_set_property, 547 .late_register = intel_connector_register, 548 .early_unregister = intel_connector_unregister, 549 .destroy = intel_connector_destroy, 550 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 551 .atomic_duplicate_state = intel_digital_connector_duplicate_state, 552 }; 553 554 static int intel_dp_mst_get_modes(struct drm_connector *connector) 555 { 556 return intel_dp_mst_get_ddc_modes(connector); 557 } 558 559 static enum drm_mode_status 560 intel_dp_mst_mode_valid(struct drm_connector *connector, 561 struct drm_display_mode *mode) 562 { 563 struct drm_i915_private *dev_priv = to_i915(connector->dev); 564 struct intel_connector *intel_connector = to_intel_connector(connector); 565 struct intel_dp *intel_dp = intel_connector->mst_port; 566 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq; 567 int max_rate, mode_rate, max_lanes, max_link_clock; 568 569 if (drm_connector_is_unregistered(connector)) 570 return MODE_ERROR; 571 572 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 573 return MODE_NO_DBLESCAN; 574 575 max_link_clock = intel_dp_max_link_rate(intel_dp); 576 max_lanes = intel_dp_max_lane_count(intel_dp); 577 578 max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes); 579 mode_rate = intel_dp_link_required(mode->clock, 18); 580 581 /* TODO - validate mode against available PBN for link */ 582 if (mode->clock < 10000) 583 return MODE_CLOCK_LOW; 584 585 if (mode->flags & DRM_MODE_FLAG_DBLCLK) 586 return MODE_H_ILLEGAL; 587 588 if (mode_rate > max_rate || mode->clock > max_dotclk) 589 return MODE_CLOCK_HIGH; 590 591 return intel_mode_valid_max_plane_size(dev_priv, mode); 592 } 593 594 static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector, 595 struct drm_connector_state *state) 596 { 597 struct intel_connector *intel_connector = to_intel_connector(connector); 598 struct intel_dp *intel_dp = intel_connector->mst_port; 599 struct intel_crtc *crtc = to_intel_crtc(state->crtc); 600 601 return &intel_dp->mst_encoders[crtc->pipe]->base.base; 602 } 603 604 static int 605 intel_dp_mst_detect(struct drm_connector *connector, 606 struct drm_modeset_acquire_ctx *ctx, bool force) 607 { 608 struct intel_connector *intel_connector = to_intel_connector(connector); 609 struct intel_dp *intel_dp = intel_connector->mst_port; 610 611 if (drm_connector_is_unregistered(connector)) 612 return connector_status_disconnected; 613 614 return drm_dp_mst_detect_port(connector, ctx, &intel_dp->mst_mgr, 615 intel_connector->port); 616 } 617 618 static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = { 619 .get_modes = intel_dp_mst_get_modes, 620 .mode_valid = intel_dp_mst_mode_valid, 621 .atomic_best_encoder = intel_mst_atomic_best_encoder, 622 .atomic_check = intel_dp_mst_atomic_check, 623 .detect_ctx = intel_dp_mst_detect, 624 }; 625 626 static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder) 627 { 628 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(to_intel_encoder(encoder)); 629 630 drm_encoder_cleanup(encoder); 631 kfree(intel_mst); 632 } 633 634 static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = { 635 .destroy = intel_dp_mst_encoder_destroy, 636 }; 637 638 static bool intel_dp_mst_get_hw_state(struct intel_connector *connector) 639 { 640 if (connector->encoder && connector->base.state->crtc) { 641 enum pipe pipe; 642 if (!connector->encoder->get_hw_state(connector->encoder, &pipe)) 643 return false; 644 return true; 645 } 646 return false; 647 } 648 649 static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop) 650 { 651 struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); 652 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); 653 struct drm_device *dev = intel_dig_port->base.base.dev; 654 struct drm_i915_private *dev_priv = to_i915(dev); 655 struct intel_connector *intel_connector; 656 struct drm_connector *connector; 657 enum pipe pipe; 658 int ret; 659 660 intel_connector = intel_connector_alloc(); 661 if (!intel_connector) 662 return NULL; 663 664 intel_connector->get_hw_state = intel_dp_mst_get_hw_state; 665 intel_connector->mst_port = intel_dp; 666 intel_connector->port = port; 667 drm_dp_mst_get_port_malloc(port); 668 669 connector = &intel_connector->base; 670 ret = drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, 671 DRM_MODE_CONNECTOR_DisplayPort); 672 if (ret) { 673 intel_connector_free(intel_connector); 674 return NULL; 675 } 676 677 drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs); 678 679 for_each_pipe(dev_priv, pipe) { 680 struct drm_encoder *enc = 681 &intel_dp->mst_encoders[pipe]->base.base; 682 683 ret = drm_connector_attach_encoder(&intel_connector->base, enc); 684 if (ret) 685 goto err; 686 } 687 688 drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0); 689 drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0); 690 691 ret = drm_connector_set_path_property(connector, pathprop); 692 if (ret) 693 goto err; 694 695 intel_attach_force_audio_property(connector); 696 intel_attach_broadcast_rgb_property(connector); 697 698 /* 699 * Reuse the prop from the SST connector because we're 700 * not allowed to create new props after device registration. 701 */ 702 connector->max_bpc_property = 703 intel_dp->attached_connector->base.max_bpc_property; 704 if (connector->max_bpc_property) 705 drm_connector_attach_max_bpc_property(connector, 6, 12); 706 707 return connector; 708 709 err: 710 drm_connector_cleanup(connector); 711 return NULL; 712 } 713 714 static void intel_dp_register_mst_connector(struct drm_connector *connector) 715 { 716 struct drm_i915_private *dev_priv = to_i915(connector->dev); 717 718 if (dev_priv->fbdev) 719 drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, 720 connector); 721 722 drm_connector_register(connector); 723 } 724 725 static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr, 726 struct drm_connector *connector) 727 { 728 struct drm_i915_private *dev_priv = to_i915(connector->dev); 729 730 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", connector->base.id, connector->name); 731 drm_connector_unregister(connector); 732 733 if (dev_priv->fbdev) 734 drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, 735 connector); 736 737 drm_connector_put(connector); 738 } 739 740 static const struct drm_dp_mst_topology_cbs mst_cbs = { 741 .add_connector = intel_dp_add_mst_connector, 742 .register_connector = intel_dp_register_mst_connector, 743 .destroy_connector = intel_dp_destroy_mst_connector, 744 }; 745 746 static struct intel_dp_mst_encoder * 747 intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe) 748 { 749 struct intel_dp_mst_encoder *intel_mst; 750 struct intel_encoder *intel_encoder; 751 struct drm_device *dev = intel_dig_port->base.base.dev; 752 753 intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL); 754 755 if (!intel_mst) 756 return NULL; 757 758 intel_mst->pipe = pipe; 759 intel_encoder = &intel_mst->base; 760 intel_mst->primary = intel_dig_port; 761 762 drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs, 763 DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe)); 764 765 intel_encoder->type = INTEL_OUTPUT_DP_MST; 766 intel_encoder->power_domain = intel_dig_port->base.power_domain; 767 intel_encoder->port = intel_dig_port->base.port; 768 intel_encoder->cloneable = 0; 769 /* 770 * This is wrong, but broken userspace uses the intersection 771 * of possible_crtcs of all the encoders of a given connector 772 * to figure out which crtcs can drive said connector. What 773 * should be used instead is the union of possible_crtcs. 774 * To keep such userspace functioning we must misconfigure 775 * this to make sure the intersection is not empty :( 776 */ 777 intel_encoder->pipe_mask = ~0; 778 779 intel_encoder->compute_config = intel_dp_mst_compute_config; 780 intel_encoder->disable = intel_mst_disable_dp; 781 intel_encoder->post_disable = intel_mst_post_disable_dp; 782 intel_encoder->pre_pll_enable = intel_mst_pre_pll_enable_dp; 783 intel_encoder->pre_enable = intel_mst_pre_enable_dp; 784 intel_encoder->enable = intel_mst_enable_dp; 785 intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state; 786 intel_encoder->get_config = intel_dp_mst_enc_get_config; 787 788 return intel_mst; 789 790 } 791 792 static bool 793 intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port) 794 { 795 struct intel_dp *intel_dp = &intel_dig_port->dp; 796 struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev); 797 enum pipe pipe; 798 799 for_each_pipe(dev_priv, pipe) 800 intel_dp->mst_encoders[pipe] = intel_dp_create_fake_mst_encoder(intel_dig_port, pipe); 801 return true; 802 } 803 804 int 805 intel_dp_mst_encoder_active_links(struct intel_digital_port *intel_dig_port) 806 { 807 return intel_dig_port->dp.active_mst_links; 808 } 809 810 int 811 intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id) 812 { 813 struct drm_i915_private *i915 = to_i915(intel_dig_port->base.base.dev); 814 struct intel_dp *intel_dp = &intel_dig_port->dp; 815 enum port port = intel_dig_port->base.port; 816 int ret; 817 818 if (!HAS_DP_MST(i915) || intel_dp_is_edp(intel_dp)) 819 return 0; 820 821 if (INTEL_GEN(i915) < 12 && port == PORT_A) 822 return 0; 823 824 if (INTEL_GEN(i915) < 11 && port == PORT_E) 825 return 0; 826 827 intel_dp->mst_mgr.cbs = &mst_cbs; 828 829 /* create encoders */ 830 intel_dp_create_fake_mst_encoders(intel_dig_port); 831 ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, &i915->drm, 832 &intel_dp->aux, 16, 3, conn_base_id); 833 if (ret) 834 return ret; 835 836 intel_dp->can_mst = true; 837 838 return 0; 839 } 840 841 void 842 intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port) 843 { 844 struct intel_dp *intel_dp = &intel_dig_port->dp; 845 846 if (!intel_dp->can_mst) 847 return; 848 849 drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr); 850 /* encoders will get killed by normal cleanup */ 851 } 852 853 bool intel_dp_mst_is_master_trans(const struct intel_crtc_state *crtc_state) 854 { 855 return crtc_state->mst_master_transcoder == crtc_state->cpu_transcoder; 856 } 857 858 bool intel_dp_mst_is_slave_trans(const struct intel_crtc_state *crtc_state) 859 { 860 return crtc_state->mst_master_transcoder != INVALID_TRANSCODER && 861 crtc_state->mst_master_transcoder != crtc_state->cpu_transcoder; 862 } 863