| /src/sys/arch/x86/x86/ |
| mp.c | 213 struct mp_intr_map *mip, *intrs; local in function:intr_scan_bus
218 intrs = mp_busses[bus].mb_intrs;
219 if (intrs == NULL)
222 for (mip = intrs; mip != NULL; mip = mip->next) {
|
| /src/sys/arch/powerpc/ibm4xx/dev/ |
| mal.c | 54 int intrs[5]; member in struct:maltbl
96 intr_establish_xname(maltbl[i].intrs[0], IST_LEVEL, IPL_NET,
98 intr_establish_xname(maltbl[i].intrs[1], IST_LEVEL, IPL_NET,
100 intr_establish_xname(maltbl[i].intrs[2], IST_LEVEL, IPL_NET,
102 intr_establish_xname(maltbl[i].intrs[3], IST_LEVEL, IPL_NET,
104 intr_establish_xname(maltbl[i].intrs[4], IST_LEVEL, IPL_NET,
|
| /src/sys/arch/evbmips/ingenic/ |
| intr.c | 100 struct intrhand intrs[NINTR]; variable in typeref:struct:intrhand[]
118 intrs[i].ih_func = NULL;
119 intrs[i].ih_arg = NULL;
120 snprintf(intrs[i].ih_name, sizeof(intrs[i].ih_name),
122 evcnt_attach_dynamic(&intrs[i].ih_count, EVCNT_TYPE_INTR,
123 NULL, "INTC", intrs[i].ih_name);
270 intrs[idx].ih_count.ev_count++;
271 if (intrs[idx].ih_func != NULL) {
272 if (intrs[idx].ih_ipl == IPL_VM
[all...] |
| /src/sys/arch/macppc/dev/ |
| kauai.c | 114 uint32_t intrs[4], intr; local in function:kauai_attach
140 if (OF_getprop(node, "interrupts", intrs, sizeof(intrs)) >= 4) {
141 intr = intrs[0];
|
| /src/sys/dev/pci/ |
| voyager.c | 372 uint32_t intrs; local in function:voyager_intr
376 intrs = bus_space_read_4(sc->sc_memt, sc->sc_regh, SM502_INTR_STATUS);
378 intrs &= mask;
380 while (intrs != 0) {
381 num = ffs32(intrs) - 1;
383 intrs &= ~bit;
|
| auacer.c | 784 int ret, intrs; local in function:auacer_intr
788 DPRINTF(ALI_DEBUG_INTR, ("auacer_intr: intrs=0x%x\n",
792 intrs = READ4(sc, ALI_INTERRUPTSR);
794 if (intrs & ALI_INT_PCMOUT) {
|
| if_et.c | 693 et_enable_intrs(struct et_softc *sc, uint32_t intrs)
695 CSR_WRITE_4(sc, ET_INTR_MASK, ~intrs);
1018 uint32_t intrs; local in function:et_intr
1023 intrs = CSR_READ_4(sc, ET_INTR_STATUS);
1024 if (intrs == 0 || intrs == 0xffffffff)
1028 intrs &= ET_INTRS;
1029 if (intrs == 0) /* Not interested */
1032 if (intrs & ET_INTR_RXEOF)
1034 if (intrs & (ET_INTR_TXEOF | ET_INTR_TIMER)
[all...] |
| if_ti.c | 1150 uint32_t intrs; local in function:ti_setmulti
1155 intrs = CSR_READ_4(sc, TI_MB_HOSTINTR);
1197 CSR_WRITE_4(sc, TI_MB_HOSTINTR, intrs);
1213 CSR_WRITE_4(sc, TI_MB_HOSTINTR, intrs);
|
| /src/sys/dev/pci/ixgbe/ |
| ixgbe_osdep.h | 179 pci_intr_handle_t *intrs; member in struct:ixgbe_osdep
|
| /src/sys/dev/ic/ |
| interwave.c | 131 u_char intrs; local in function:iwintr
135 intrs = 0;
139 IW_READ_DIRECT_1(6, sc->p2xr_h, intrs); /* UISR */
152 IW_READ_CODEC_1(CSR3I, intrs);
160 if (intrs & 0x20) {
168 if (intrs & 0x10) {
|
| bwi.c | 1433 uint32_t intrs; local in function:bwi_mac_init
1436 intrs = BWI_TXRX_RX_INTRS;
1438 intrs = BWI_TXRX_TX_INTRS;
1439 CSR_WRITE_4(sc, BWI_TXRX_INTR_MASK(i), intrs);
7350 /* Enable intrs */
|
| /src/sys/arch/powerpc/include/ |
| pci_machdep.h | 451 int16_t intrs; member in struct:_ofw_pic_node_t
|
| /src/sys/external/bsd/dwc2/ |
| dwc2.c | 1151 uint32_t intrs; local in function:dwc2_intr
1153 intrs = dwc2_read_core_intr(hsotg);
1154 DWC2_WRITE_4(hsotg, GINTSTS, intrs);
|
| /src/sys/dev/usb/ |
| ohci.c | 1297 /* for level triggered intrs, should do something to ack */
1314 uint32_t intrs, eintrs; local in function:ohci_intr1
1328 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1329 if (!intrs)
1333 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH));
1334 eintrs = intrs & sc->sc_eintrs;
1336 DPRINTFN(7, "intrs=%#jx(%#jx) eintrs=%#jx(%#jx)",
1337 intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), eintrs,
1400 DPRINTF("sc %#jx blocking intrs %#jx", (uintptr_t)sc,
1819 DPRINTFN(10, "intrs=0x%04jx", new, 0, 0, 0)
[all...] |
| ehci.c | 752 uint32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); local in function:ehci_intr
754 if (intrs)
755 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
770 uint32_t intrs, eintrs; local in function:ehci_intr1
784 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
785 if (!intrs)
788 eintrs = intrs & sc->sc_eintrs;
789 DPRINTF("sc=%#jx intrs=%#jx(%#jx) eintrs=%#jx", (uintptr_t)sc, intrs,
794 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge *
[all...] |
| /src/sys/dev/pci/igc/ |
| if_igc.c | 1193 pci_intr_handle_t *intrs; local in function:igc_setup_msix
1200 for (iq = 0, intrs = sc->sc_intrs, ihs = sc->sc_ihs;
1201 iq < sc->sc_nqueues; iq++, intrs++, ihs++) {
1207 intrstr = pci_intr_string(pc, *intrs, intrbuf, sizeof(intrbuf));
1209 pci_intr_setattr(pc, intrs, PCI_INTR_MPSAFE, true);
1210 *ihs = pci_intr_establish_xname(pc, *intrs, IPL_NET,
1253 intrstr = pci_intr_string(pc, *intrs, intrbuf, sizeof(intrbuf));
1255 pci_intr_setattr(pc, intrs, PCI_INTR_MPSAFE, true);
1256 *ihs = pci_intr_establish_xname(pc, *intrs, IPL_NET,
|
| /src/sys/uvm/ |
| uvm_extern.h | 356 int intrs; /* interrupt count */ member in struct:uvmexp
452 int64_t intrs; member in struct:uvmexp_sysctl
|
