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      1 /*	$NetBSD: iommureg.h,v 1.9 2005/11/16 22:10:58 uwe Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1996
      5  * 	The President and Fellows of Harvard College. All rights reserved.
      6  * Copyright (c) 1995 	Paul Kranenburg
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. All advertising materials mentioning features or use of this software
     17  *    must display the following acknowledgement:
     18  *	This product includes software developed by Aaron Brown and
     19  *	Harvard University.
     20  *	This product includes software developed by Paul Kranenburg.
     21  * 4. Neither the name of the University nor the names of its contributors
     22  *    may be used to endorse or promote products derived from this software
     23  *    without specific prior written permission.
     24  *
     25  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     27  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     28  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     29  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     30  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     31  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     32  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     33  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     34  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     35  * SUCH DAMAGE.
     36  *
     37  */
     38 
     39 /* IOMMU registers */
     40 struct iommureg {
     41 	uint32_t	io_cr;		/* IOMMU control register */
     42 	uint32_t	io_bar;		/* IOMMU PTE base register */
     43 	uint32_t	io_fill1[3];
     44 	uint32_t	io_flashclear;	/* Flush all TLB entries */
     45 	uint32_t	io_flushpage;	/* Flush page from TLB */
     46 };
     47 
     48 /* Control register bits */
     49 #define IOMMU_CTL_IMPL		0xf0000000	/* Hardware implementation */
     50 #define IOMMU_CTL_VER		0x0f000000	/* Hardware version */
     51 #define IOMMU_CTL_RSVD1		0x00ffffe0	/* Reserved bits */
     52 #define IOMMU_CTL_RANGE		0x0000001c	/* Available DVMA range */
     53 #define IOMMU_CTL_RANGESHFT	2		/*  == log2(range/16MB) */
     54 #define IOMMU_CTL_DE		0x00000002	/* Diagnostic access enable */
     55 #define IOMMU_CTL_ME		0x00000001	/* Enable translations */
     56 
     57 /* Base register bits */
     58 #define IOMMU_BAR_IBA		0xfffffc00
     59 #define IOMMU_BAR_IBASHFT	10
     60 
     61 /* Flushpage fields */
     62 #define IOMMU_FLPG_VADDR	0xfffff000
     63 #define IOMMU_FLUSH_MASK	0xfffff000
     64 
     65 /*
     66  * A few empty cycles after touching the IOMMU registers seems to
     67  * avoid utter lossage on some machines (SS4s & SS5s) where our caller
     68  * would see some of its local (`%lx') registers trashed.
     69  */
     70 #define IOMMU_FLUSHPAGE(sc, va)	do {				\
     71 	(sc)->sc_reg->io_flushpage = (va) & IOMMU_FLUSH_MASK;	\
     72 	__asm("nop;nop;nop;nop;nop;nop;");			\
     73 } while (0);
     74 #define IOMMU_FLUSHALL(sc)	do {				\
     75 	(sc)->sc_reg->io_flashclear = 0;			\
     76 	__asm("nop;nop;nop;nop;nop;nop;");			\
     77 } while (0)
     78 
     79 typedef uint32_t iopte_t;
     80 
     81 /* IOMMU PTE bits */
     82 #define IOPTE_PPN	0xffffff00	/* PA<35:12> */
     83 #define IOPTE_C		0x00000080 	/* cacheable */
     84 #define IOPTE_W		0x00000004	/* writable */
     85 #define IOPTE_V		0x00000002	/* valid */
     86 #define IOPTE_WAZ	0x00000001	/* must write as zero */
     87 
     88 #define IOPTE_PPNSHFT	8		/* shift to get ppn from IOPTE */
     89 #define IOPTE_PPNPASHFT	4		/* shift to get pa from ioppn */
     90 
     91 #define IOPTE_BITS "\20\10C\3W\2V\1WAZ"
     92 
     93