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      1 //===- AMDGPUGlobalISelUtils.cpp ---------------------------------*- C++ -*-==//
      2 //
      3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
      4 // See https://llvm.org/LICENSE.txt for license information.
      5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
      6 //
      7 //===----------------------------------------------------------------------===//
      8 
      9 #include "AMDGPUGlobalISelUtils.h"
     10 #include "llvm/CodeGen/GlobalISel/MIPatternMatch.h"
     11 #include "llvm/IR/Constants.h"
     12 
     13 using namespace llvm;
     14 using namespace MIPatternMatch;
     15 
     16 std::pair<Register, unsigned>
     17 AMDGPU::getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg) {
     18   MachineInstr *Def = getDefIgnoringCopies(Reg, MRI);
     19   if (!Def)
     20     return std::make_pair(Reg, 0);
     21 
     22   if (Def->getOpcode() == TargetOpcode::G_CONSTANT) {
     23     unsigned Offset;
     24     const MachineOperand &Op = Def->getOperand(1);
     25     if (Op.isImm())
     26       Offset = Op.getImm();
     27     else
     28       Offset = Op.getCImm()->getZExtValue();
     29 
     30     return std::make_pair(Register(), Offset);
     31   }
     32 
     33   int64_t Offset;
     34   if (Def->getOpcode() == TargetOpcode::G_ADD) {
     35     // TODO: Handle G_OR used for add case
     36     if (mi_match(Def->getOperand(2).getReg(), MRI, m_ICst(Offset)))
     37       return std::make_pair(Def->getOperand(1).getReg(), Offset);
     38 
     39     // FIXME: matcher should ignore copies
     40     if (mi_match(Def->getOperand(2).getReg(), MRI, m_Copy(m_ICst(Offset))))
     41       return std::make_pair(Def->getOperand(1).getReg(), Offset);
     42   }
     43 
     44   // Handle G_PTRTOINT (G_PTR_ADD base, const) case
     45   if (Def->getOpcode() == TargetOpcode::G_PTRTOINT) {
     46     MachineInstr *Base;
     47     if (mi_match(Def->getOperand(1).getReg(), MRI,
     48                  m_GPtrAdd(m_MInstr(Base), m_ICst(Offset)))) {
     49       // If Base was int converted to pointer, simply return int and offset.
     50       if (Base->getOpcode() == TargetOpcode::G_INTTOPTR)
     51         return std::make_pair(Base->getOperand(1).getReg(), Offset);
     52 
     53       // Register returned here will be of pointer type.
     54       return std::make_pair(Base->getOperand(0).getReg(), Offset);
     55     }
     56   }
     57 
     58   return std::make_pair(Reg, 0);
     59 }
     60 
     61 bool AMDGPU::isLegalVOP3PShuffleMask(ArrayRef<int> Mask) {
     62   assert(Mask.size() == 2);
     63 
     64   // If one half is undef, the other is trivially in the same reg.
     65   if (Mask[0] == -1 || Mask[1] == -1)
     66     return true;
     67   return (Mask[0] & 2) == (Mask[1] & 2);
     68 }
     69