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      1 //===-- AMDGPUMachineFunctionInfo.h -------------------------------*- C++ -*-=//
      2 //
      3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
      4 // See https://llvm.org/LICENSE.txt for license information.
      5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
      6 //
      7 //===----------------------------------------------------------------------===//
      8 
      9 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUMACHINEFUNCTION_H
     10 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUMACHINEFUNCTION_H
     11 
     12 #include "Utils/AMDGPUBaseInfo.h"
     13 #include "llvm/ADT/DenseMap.h"
     14 #include "llvm/CodeGen/MachineFunction.h"
     15 
     16 namespace llvm {
     17 
     18 class GCNSubtarget;
     19 
     20 class AMDGPUMachineFunction : public MachineFunctionInfo {
     21   /// A map to keep track of local memory objects and their offsets within the
     22   /// local memory space.
     23   SmallDenseMap<const GlobalValue *, unsigned, 4> LocalMemoryObjects;
     24 
     25 protected:
     26   uint64_t ExplicitKernArgSize = 0; // Cache for this.
     27   Align MaxKernArgAlign;        // Cache for this.
     28 
     29   /// Number of bytes in the LDS that are being used.
     30   unsigned LDSSize = 0;
     31 
     32   /// Number of bytes in the LDS allocated statically. This field is only used
     33   /// in the instruction selector and not part of the machine function info.
     34   unsigned StaticLDSSize = 0;
     35 
     36   /// Align for dynamic shared memory if any. Dynamic shared memory is
     37   /// allocated directly after the static one, i.e., LDSSize. Need to pad
     38   /// LDSSize to ensure that dynamic one is aligned accordingly.
     39   /// The maximal alignment is updated during IR translation or lowering
     40   /// stages.
     41   Align DynLDSAlign;
     42 
     43   // State of MODE register, assumed FP mode.
     44   AMDGPU::SIModeRegisterDefaults Mode;
     45 
     46   // Kernels + shaders. i.e. functions called by the hardware and not called
     47   // by other functions.
     48   bool IsEntryFunction = false;
     49 
     50   // Entry points called by other functions instead of directly by the hardware.
     51   bool IsModuleEntryFunction = false;
     52 
     53   bool NoSignedZerosFPMath = false;
     54 
     55   // Function may be memory bound.
     56   bool MemoryBound = false;
     57 
     58   // Kernel may need limited waves per EU for better performance.
     59   bool WaveLimiter = false;
     60 
     61 public:
     62   AMDGPUMachineFunction(const MachineFunction &MF);
     63 
     64   uint64_t getExplicitKernArgSize() const {
     65     return ExplicitKernArgSize;
     66   }
     67 
     68   unsigned getMaxKernArgAlign() const { return MaxKernArgAlign.value(); }
     69 
     70   unsigned getLDSSize() const {
     71     return LDSSize;
     72   }
     73 
     74   AMDGPU::SIModeRegisterDefaults getMode() const {
     75     return Mode;
     76   }
     77 
     78   bool isEntryFunction() const {
     79     return IsEntryFunction;
     80   }
     81 
     82   bool isModuleEntryFunction() const { return IsModuleEntryFunction; }
     83 
     84   bool hasNoSignedZerosFPMath() const {
     85     return NoSignedZerosFPMath;
     86   }
     87 
     88   bool isMemoryBound() const {
     89     return MemoryBound;
     90   }
     91 
     92   bool needsWaveLimiter() const {
     93     return WaveLimiter;
     94   }
     95 
     96   unsigned allocateLDSGlobal(const DataLayout &DL, const GlobalVariable &GV);
     97   void allocateModuleLDSGlobal(const Module *M);
     98 
     99   Align getDynLDSAlign() const { return DynLDSAlign; }
    100 
    101   void setDynLDSAlign(const DataLayout &DL, const GlobalVariable &GV);
    102 };
    103 
    104 }
    105 #endif
    106