1 /* $NetBSD: ofwpci.c,v 1.21 2021/08/07 16:19:01 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2007 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Tim Rightnour 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: ofwpci.c,v 1.21 2021/08/07 16:19:01 thorpej Exp $"); 34 35 #include "opt_pci.h" 36 37 #include <sys/param.h> 38 #include <sys/device.h> 39 #include <sys/kmem.h> 40 #include <sys/systm.h> 41 42 #include <dev/pci/pcivar.h> 43 #include <dev/pci/pciconf.h> 44 #include <dev/ofw/openfirm.h> 45 #include <dev/ofw/ofw_pci.h> 46 47 #include <machine/autoconf.h> 48 #include <machine/isa_machdep.h> 49 #include <machine/pio.h> 50 51 struct ofwpci_softc { 52 device_t sc_dev; 53 struct genppc_pci_chipset sc_pc; 54 struct powerpc_bus_space sc_iot; 55 struct powerpc_bus_space sc_memt; 56 }; 57 58 static void ofwpci_attach(device_t, device_t, void *); 59 static int ofwpci_match(device_t, cfdata_t, void *); 60 61 CFATTACH_DECL_NEW(ofwpci, sizeof(struct ofwpci_softc), 62 ofwpci_match, ofwpci_attach, NULL, NULL); 63 64 extern struct genppc_pci_chipset *genppc_pct; 65 extern struct model_data modeldata; 66 67 static void 68 ofwpci_get_chipset_tag(pci_chipset_tag_t pc) 69 { 70 pc->pc_conf_v = (void *)pc; 71 72 pc->pc_attach_hook = genppc_pci_ofmethod_attach_hook; 73 pc->pc_bus_maxdevs = genppc_pci_bus_maxdevs; 74 pc->pc_make_tag = genppc_pci_ofmethod_make_tag; 75 pc->pc_conf_read = genppc_pci_ofmethod_conf_read; 76 pc->pc_conf_write = genppc_pci_ofmethod_conf_write; 77 78 pc->pc_intr_v = (void *)pc; 79 80 pc->pc_intr_map = genofw_pci_intr_map; 81 pc->pc_intr_string = genppc_pci_intr_string; 82 pc->pc_intr_evcnt = genppc_pci_intr_evcnt; 83 pc->pc_intr_establish = genppc_pci_intr_establish; 84 pc->pc_intr_disestablish = genppc_pci_intr_disestablish; 85 pc->pc_intr_setattr = genppc_pci_intr_setattr; 86 pc->pc_intr_type = genppc_pci_intr_type; 87 pc->pc_intr_alloc = genppc_pci_intr_alloc; 88 pc->pc_intr_release = genppc_pci_intr_release; 89 pc->pc_intx_alloc = genppc_pci_intx_alloc; 90 91 pc->pc_msi_v = (void *)pc; 92 genppc_pci_chipset_msi_init(pc); 93 94 pc->pc_msix_v = (void *)pc; 95 genppc_pci_chipset_msix_init(pc); 96 97 pc->pc_conf_interrupt = genppc_pci_conf_interrupt; 98 pc->pc_decompose_tag = genppc_pci_ofmethod_decompose_tag; 99 pc->pc_conf_hook = genofw_pci_conf_hook; 100 101 pc->pc_addr = 0; 102 pc->pc_data = 0; 103 pc->pc_bus = 0; 104 pc->pc_node = 0; 105 pc->pc_memt = 0; 106 pc->pc_iot = 0; 107 pc->pc_ihandle = 0; 108 } 109 110 static int 111 ofwpci_match(device_t parent, cfdata_t cf, void *aux) 112 { 113 struct confargs *ca = aux; 114 char name[32]; 115 116 if (strcmp(ca->ca_name, "pci") != 0) 117 return 0; 118 119 memset(name, 0, sizeof(name)); 120 OF_getprop(ca->ca_node, "device_type", name, sizeof(name)); 121 if (strcmp(name, "pci") != 0) 122 return 0; 123 124 return 1; 125 } 126 127 static void 128 ofwpci_attach(device_t parent, device_t self, void *aux) 129 { 130 struct ofwpci_softc *sc = device_private(self); 131 pci_chipset_tag_t pc = &sc->sc_pc; 132 struct confargs *ca = aux; 133 struct pcibus_attach_args pba; 134 struct genppc_pci_chipset_businfo *pbi; 135 int node = ca->ca_node; 136 int i; 137 uint32_t busrange[2]; 138 char buf[64]; 139 140 aprint_normal("\n"); 141 142 sc->sc_dev = self; 143 144 /* PCI bus number */ 145 if (OF_getprop(node, "bus-range", busrange, sizeof(busrange)) != 8) 146 return; 147 148 /* bus space map the io ranges */ 149 sc->sc_iot.pbs_flags = _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_IO_TYPE; 150 sc->sc_iot.pbs_base = 0x00000000; 151 if (ofwoea_map_space(RANGE_TYPE_PCI, RANGE_IO, node, &sc->sc_iot, 152 "ofwpci io-space") != 0) 153 panic("Can't init ofwpci io tag"); 154 155 sc->sc_memt.pbs_flags = _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_MEM_TYPE; 156 sc->sc_memt.pbs_base = 0x00000000; 157 if (ofwoea_map_space(RANGE_TYPE_PCI, RANGE_MEM, node, &sc->sc_memt, 158 "ofwpci mem-space") != 0) 159 panic("Can't init ofwpci mem tag"); 160 161 aprint_debug("io base=0x%"PRIxPTR" offset=0x%"PRIxPTR" limit=0x%"PRIxPTR"\n", 162 sc->sc_iot.pbs_base, sc->sc_iot.pbs_offset, sc->sc_iot.pbs_limit); 163 164 aprint_debug("mem base=0x%"PRIxPTR" offset=0x%"PRIxPTR" limit=0x%"PRIxPTR"\n", 165 sc->sc_memt.pbs_base, sc->sc_memt.pbs_offset, 166 sc->sc_memt.pbs_limit); 167 168 /* are we the primary pci bus? */ 169 if (of_find_firstchild_byname(OF_finddevice("/"), "pci") == node) { 170 int isa_node; 171 172 /* yes we are, now do we have an ISA child? */ 173 isa_node = of_find_firstchild_byname(node, "isa"); 174 if (isa_node != -1) { 175 /* isa == pci */ 176 genppc_isa_io_space_tag = sc->sc_iot; 177 genppc_isa_mem_space_tag = sc->sc_memt; 178 map_isa_ioregs(); 179 init_ofppc_interrupt(); 180 ofppc_init_comcons(isa_node); 181 } 182 } 183 184 ofwpci_get_chipset_tag(pc); 185 186 pc->pc_node = node; 187 i = OF_package_to_path(node, buf, sizeof(buf)-5); 188 if (i <= 0) 189 panic("Can't determine path for pci node %d", node); 190 buf[i] = '\0'; 191 pc->pc_ihandle = OF_open(buf); 192 if (pc->pc_ihandle < 0) 193 panic("Can't open device %s", buf); 194 pc->pc_bus = busrange[0]; 195 pc->pc_iot = &sc->sc_iot; 196 pc->pc_memt = &sc->sc_memt; 197 198 pbi = kmem_alloc(sizeof(struct genppc_pci_chipset_businfo), KM_SLEEP); 199 pbi->pbi_properties = prop_dictionary_create(); 200 KASSERT(pbi->pbi_properties != NULL); 201 SIMPLEQ_INIT(&pc->pc_pbi); 202 SIMPLEQ_INSERT_TAIL(&pc->pc_pbi, pbi, next); 203 204 genofw_setup_pciintr_map((void *)pc, pbi, pc->pc_node); 205 #ifdef PCI_NETBSD_CONFIGURE 206 struct pciconf_resources *pcires = pciconf_resource_init(); 207 208 pciconf_resource_add(pcires, PCICONF_RESOURCE_IO, 209 modeldata.pciiodata[device_unit(self)].start, 210 (modeldata.pciiodata[device_unit(self)].limit - 211 modeldata.pciiodata[device_unit(self)].start) + 1); 212 213 pciconf_resource_add(pcires, PCICONF_RESOURCE_MEM, 214 sc->sc_memt.pbs_base, 215 (sc->sc_memt.pbs_limit - sc->sc_memt.pbs_base) + 1); 216 217 if (pci_configure_bus(pc, pcires, 0, CACHELINESIZE)) 218 aprint_error("pci_configure_bus() failed\n"); 219 220 pciconf_resource_fini(pcires); 221 #endif /* PCI_NETBSD_CONFIGURE */ 222 memset(&pba, 0, sizeof(pba)); 223 pba.pba_memt = pc->pc_memt; 224 pba.pba_iot = pc->pc_iot; 225 pba.pba_dmat = &pci_bus_dma_tag; 226 pba.pba_dmat64 = NULL; 227 pba.pba_bus = pc->pc_bus; 228 pba.pba_bridgetag = NULL; 229 pba.pba_pc = pc; 230 pba.pba_flags = PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY; 231 config_found(self, &pba, pcibusprint, 232 CFARGS(.devhandle = device_handle(self))); 233 } 234
Indexes created Wed Sep 24 05:09:52 GMT 2025