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      1 /*	$NetBSD: ka46.c,v 1.26 2017/05/22 16:46:15 ragge Exp $ */
      2 /*
      3  * Copyright (c) 1998 Ludd, University of Lule}, Sweden.
      4  * All rights reserved.
      5  *
      6  * This code is derived from software contributed to Ludd by Bertram Barth.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  *
     17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     26  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27  */
     28 
     29 #include <sys/cdefs.h>
     30 __KERNEL_RCSID(0, "$NetBSD: ka46.c,v 1.26 2017/05/22 16:46:15 ragge Exp $");
     31 
     32 #include <sys/param.h>
     33 #include <sys/systm.h>
     34 #include <sys/cpu.h>
     35 #include <sys/device.h>
     36 #include <sys/kernel.h>
     37 
     38 #include <machine/sid.h>
     39 #include <machine/nexus.h>
     40 #include <machine/ka410.h>
     41 #include <machine/ka420.h>
     42 #include <machine/ka46.h>
     43 #include <machine/clock.h>
     44 #include <machine/vsbus.h>
     45 
     46 static	void	ka46_conf(void);
     47 static	void	ka46_steal_pages(void);
     48 static	void	ka46_memerr(void);
     49 static	int	ka46_mchk(void *);
     50 static	void	ka46_halt(void);
     51 static	void	ka46_reboot(int);
     52 static	void	ka46_cache_enable(void);
     53 
     54 static const char * const ka46_devs[] = { "cpu", "vsbus", NULL };
     55 
     56 struct	vs_cpu *ka46_cpu;
     57 
     58 /*
     59  * Declaration of 46-specific calls.
     60  */
     61 const struct cpu_dep ka46_calls = {
     62 	.cpu_steal_pages = ka46_steal_pages,
     63 	.cpu_mchk	= ka46_mchk,
     64 	.cpu_memerr	= ka46_memerr,
     65 	.cpu_conf	= ka46_conf,
     66 	.cpu_gettime	= chip_gettime,
     67 	.cpu_settime	= chip_settime,
     68 	.cpu_vups	= 12,      /* ~VUPS */
     69 	.cpu_scbsz	= 2,	/* SCB pages */
     70 	.cpu_halt	= ka46_halt,
     71 	.cpu_reboot	= ka46_reboot,
     72 	.cpu_devs	= ka46_devs,
     73 	.cpu_flags	= CPU_RAISEIPL,
     74 };
     75 
     76 static const char * const ka46_cpustrs[4] = {
     77 	[0] = "unknown KA46 type 0",
     78 	[1] = "KA47, Mariah, 2KB L1 cache, 256KB L2 cache",
     79 	[2] = "KA46, Mariah, 2KB L1 cache, 256KB L2 cache",
     80 	[3] = "unknown KA46 type 3",
     81 };
     82 
     83 void
     84 ka46_conf(void)
     85 {
     86 	curcpu()->ci_cpustr = ka46_cpustrs[vax_siedata & 0x3];
     87 	ka46_cpu = (void *)vax_map_physmem(VS_REGS, 1);
     88 	mtpr(2, PR_ACCS); /* Enable floating points */
     89 	/*
     90 	 * Setup parameters necessary to read time from clock chip.
     91 	 */
     92 	clk_adrshift = 1;       /* Addressed at long's... */
     93 	clk_tweak = 2;          /* ...and shift two */
     94 	clk_page = (short *)vax_map_physmem(VS_CLOCK, 1);
     95 }
     96 
     97 void
     98 ka46_cache_enable(void)
     99 {
    100 	int i, *tmp;
    101 
    102 	/* Disable caches */
    103 	*(int *)KA46_CCR &= ~CCR_SPECIO;/* secondary */
    104 	mtpr(PCSTS_FLUSH, PR_PCSTS);	/* primary */
    105 	*(int *)KA46_BWF0 &= ~BWF0_FEN; /* invalidate filter */
    106 
    107 	/* Clear caches */
    108 	tmp = (void *)KA46_INVFLT;	/* inv filter */
    109 	for (i = 0; i < 32768; i++)
    110 		tmp[i] = 0;
    111 
    112 	/* Write valid parity to all primary cache entries */
    113 	for (i = 0; i < 256; i++) {
    114 		mtpr(i << 3, PR_PCIDX);
    115 		mtpr(PCTAG_PARITY, PR_PCTAG);
    116 	}
    117 
    118 	/* Secondary cache */
    119 	tmp = (void *)KA46_TAGST;
    120 	for (i = 0; i < KA46_TAGSZ*2; i+=2)
    121 		tmp[i] = 0;
    122 
    123 	/* Enable cache */
    124 	*(int *)KA46_BWF0 |= BWF0_FEN; /* invalidate filter */
    125 	mtpr(PCSTS_ENABLE, PR_PCSTS);
    126 	*(int *)KA46_CCR = CCR_SPECIO | CCR_CENA;
    127 }
    128 
    129 void
    130 ka46_memerr(void)
    131 {
    132 	printf("Memory err!\n");
    133 }
    134 
    135 int
    136 ka46_mchk(void *addr)
    137 {
    138 	panic("Machine check");
    139 	return 0;
    140 }
    141 
    142 void
    143 ka46_steal_pages(void)
    144 {
    145 
    146 	/* Turn on caches (to speed up execution a bit) */
    147 	ka46_cache_enable();
    148 }
    149 
    150 #define	KA46_CPMBX	0x38
    151 #define KA46_HLT_HALT	0xcf
    152 #define KA46_HLT_BOOT	0x8b
    153 
    154 void
    155 ka46_halt(void)
    156 {
    157 	((volatile uint8_t *) clk_page)[KA46_CPMBX] = KA46_HLT_HALT;
    158 	__asm("halt");
    159 }
    160 
    161 void
    162 ka46_reboot(int arg)
    163 {
    164 	((volatile uint8_t *) clk_page)[KA46_CPMBX] = KA46_HLT_BOOT;
    165 	__asm("halt");
    166 }
    167