| /src/usr.bin/make/unit-tests/ |
| varmod-subst-regex.mk | 9 all: mod-regex-limits-{1,2,3,4,5,6}
142 mod-regex-limits-1:
144 mod-regex-limits-2:
146 mod-regex-limits-3:
148 mod-regex-limits-4:
150 mod-regex-limits-5:
152 mod-regex-limits-6:
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| /src/tests/lib/libc/gen/ |
| t_assert.c | 49 struct rlimit limits; local in function:disable_corefile
51 limits.rlim_cur = 0;
52 limits.rlim_max = 0;
54 ATF_REQUIRE(setrlimit(RLIMIT_CORE, &limits) == 0);
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| /src/bin/ksh/ |
| c_ulimit.c | 17 the extended 4.nBSD resource limits. It now includes the code
54 static const struct limits { struct in function:c_ulimit
61 } limits[] = { local in function:c_ulimit
128 static char options[3 + NELEM(limits)];
131 const struct limits *l;
143 for (l = limits; l->name; l++)
165 for (l = limits; l->name && l->option != what; l++)
201 for (l = limits; l->name; l++) {
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| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/clk/ |
| nouveau_nvkm_subdev_clk_gf100.c | 259 struct nvbios_pll limits; local in function:calc_pll
262 ret = nvbios_pll_parse(bios, 0x137000 + (idx * 0x20), &limits);
266 limits.refclk = read_div(clk, idx, 0x137120, 0x137140);
267 if (!limits.refclk)
270 ret = gt215_pll_calc(subdev, &limits, freq, &N, NULL, &M, &P);
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| nouveau_nvkm_subdev_clk_gk104.c | 272 struct nvbios_pll limits; local in function:calc_pll
275 ret = nvbios_pll_parse(bios, 0x137000 + (idx * 0x20), &limits);
279 limits.refclk = read_div(clk, idx, 0x137120, 0x137140);
280 if (!limits.refclk)
283 ret = gt215_pll_calc(subdev, &limits, freq, &N, NULL, &M, &P);
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| nouveau_nvkm_subdev_clk_gt215.c | 245 struct nvbios_pll limits; local in function:gt215_pll_info
260 ret = nvbios_pll_parse(subdev->device->bios, pll, &limits);
264 ret = gt215_clk_info(&clk->base, idx - 0x10, limits.refclk, info);
265 if (ret != limits.refclk)
268 ret = gt215_pll_calc(subdev, &limits, khz, &N, NULL, &M, &P);
|
| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| intel_dp_mst.c | 48 struct link_config_limits *limits)
62 crtc_state->lane_count = limits->max_lane_count;
63 crtc_state->port_clock = limits->max_clock;
65 for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
156 struct link_config_limits limits; local in function:intel_dp_mst_compute_config
176 limits.min_clock =
177 limits.max_clock = intel_dp_max_link_rate(intel_dp);
179 limits.min_lane_count =
180 limits.max_lane_count = intel_dp_max_lane_count(intel_dp)
[all...] |
| intel_dp.c | 1957 /* Adjust link config limits based on compliance test requests. */
1961 struct link_config_limits *limits)
1967 limits->min_bpp = limits->max_bpp = bpp;
1986 limits->min_clock = limits->max_clock = index;
1987 limits->min_lane_count = limits->max_lane_count =
2010 const struct link_config_limits *limits)
2016 for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3)
2236 struct link_config_limits limits; local in function:intel_dp_compute_link_config
[all...] |
| /src/bin/sh/ |
| miscbltin.c | 56 #include <limits.h>
538 struct limits { struct
548 static const struct limits limits[] = { variable in typeref:typename:const struct limits[]
638 const struct limits *l;
659 for (l = limits; l->name && l->option != what; l++)
696 for (l = limits; l->name; l++) {
|
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_dpm.c | 489 ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table *limits = local in function:amdgpu_parse_extended_power_table
499 1 + (limits->numEntries * sizeof(ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record)));
503 u32 size = limits->numEntries *
512 limits->numEntries;
513 entry = &limits->entries[0];
515 for (i = 0; i < limits->numEntries; i++) {
552 ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table *limits = local in function:amdgpu_parse_extended_power_table
558 u32 size = limits->numEntries *
567 limits->numEntries;
568 entry = &limits->entries[0]
585 ATOM_PPLIB_SAMClk_Voltage_Limit_Table *limits = local in function:amdgpu_parse_extended_power_table
643 ATOM_PPLIB_ACPClk_Voltage_Limit_Table *limits = local in function:amdgpu_parse_extended_power_table
[all...] |
| /src/sys/dev/sysmon/ |
| sysmonvar.h | 64 * Thresholds/limits that are being monitored
106 sysmon_envsys_lim_t limits; /* thresholds for monitoring */ member in struct:envsys_data
123 #define ENVSYS_FMONLIMITS 0x00000040 /* monitor limits/thresholds */
|
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
| amdgpu_smu8_hwmgr.c | 1485 const struct phm_clock_and_voltage_limits *limits = local in function:smu8_get_dal_power_level
1488 info->engine_max_clock = limits->sclk;
1489 info->memory_max_clock = limits->mclk;
1492 if (limits->vddc >= table->entries[i].v) {
1643 const struct phm_clock_and_voltage_limits *limits = local in function:smu8_get_max_high_clocks
1656 clocks->memory_max_clock = limits->mclk;
|
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_r600_dpm.c | 1082 ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table *limits = local in function:r600_parse_extended_power_table
1092 1 + (limits->numEntries * sizeof(ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record)));
1096 u32 size = limits->numEntries *
1105 limits->numEntries;
1106 entry = &limits->entries[0];
1108 for (i = 0; i < limits->numEntries; i++) {
1144 ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table *limits = local in function:r600_parse_extended_power_table
1150 u32 size = limits->numEntries *
1159 limits->numEntries;
1160 entry = &limits->entries[0]
1177 ATOM_PPLIB_SAMClk_Voltage_Limit_Table *limits = local in function:r600_parse_extended_power_table
1235 ATOM_PPLIB_ACPClk_Voltage_Limit_Table *limits = local in function:r600_parse_extended_power_table
[all...] |
| pptable.h | 577 // ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table limits;
610 // ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table limits;
628 ATOM_PPLIB_SAMClk_Voltage_Limit_Table limits; member in struct:_ATOM_PPLIB_SAMU_Table
646 ATOM_PPLIB_ACPClk_Voltage_Limit_Table limits; member in struct:_ATOM_PPLIB_ACP_Table
|
| /src/bin/csh/ |
| func.c | 1094 static const struct limits { struct
1099 } limits[] = { variable in typeref:typename:const struct limits[]
1115 static const struct limits *findlim(Char *);
1116 static RLIM_TYPE getval(const struct limits *, Char **);
1118 static void plim(const struct limits *, Char);
1119 static int setlim(const struct limits *, Char, RLIM_TYPE);
1121 static const struct limits *
1124 const struct limits *lp, *res;
1127 for (lp = limits; lp->limconst >= 0; lp++)
1143 const struct limits *lp
[all...] |
| /src/sys/dev/pci/ |
| if_iwnvar.h | 235 *limits; member in struct:iwn_softc
|
| if_iwn.c | 768 sc->limits = &iwn4965_sensitivity_limits;
811 sc->limits = &iwn5000_sensitivity_limits;
818 sc->limits = &iwn5150_sensitivity_limits;
823 sc->limits = &iwn5000_sensitivity_limits;
827 sc->limits = &iwn1000_sensitivity_limits;
835 sc->limits = &iwn6000_sensitivity_limits;
846 sc->limits = &iwn6000_sensitivity_limits;
850 sc->limits = &iwn6000_sensitivity_limits;
872 sc->limits = &iwn2030_sensitivity_limits;
877 sc->limits = &iwn2000_sensitivity_limits
4181 const struct iwn_sensitivity_limits *limits = sc->limits; local in function:iwn_tune_sensitivity
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/i915/gt/ |
| intel_rps.c | 516 u32 limits; local in function:rps_limits
527 limits = rps->max_freq_softlimit << 23;
529 limits |= rps->min_freq_softlimit << 14;
531 limits = rps->max_freq_softlimit << 24;
533 limits |= rps->min_freq_softlimit << 16;
536 return limits;
1642 /* Derive initial user preferences/limits from the hardware limits */
1742 * GPU turbo limits to i915.
1747 #ifndef __NetBSD__ /* XXX IPS GPU turbo limits what? *
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/include/ |
| pptable.h | 618 // ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table limits;
651 // ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table limits;
669 ATOM_PPLIB_SAMClk_Voltage_Limit_Table limits; member in struct:_ATOM_PPLIB_SAMU_Table
687 ATOM_PPLIB_ACPClk_Voltage_Limit_Table limits; member in struct:_ATOM_PPLIB_ACP_Table
|
