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      1 /*	$OpenBSD: isa_machdep.c,v 1.1 2010/05/08 21:59:56 miod Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2009, 2010 Miodrag Vallat.
      5  *
      6  * Permission to use, copy, modify, and distribute this software for any
      7  * purpose with or without fee is hereby granted, provided that the above
      8  * copyright notice and this permission notice appear in all copies.
      9  *
     10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
     11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
     12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
     13  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
     14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
     15  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
     16  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
     17  */
     18 
     19 /*
     20  * Legacy device support.
     21  */
     22 
     23 #include <sys/param.h>
     24 #include <sys/systm.h>
     25 #include <sys/device.h>
     26 
     27 #include <mips/cpuregs.h>
     28 #include <evbmips/loongson/autoconf.h>
     29 #include <machine/intr.h>
     30 
     31 #include <dev/ic/i8259reg.h>
     32 
     33 #include <dev/pci/pcivar.h>
     34 
     35 #include <dev/isa/isareg.h>
     36 #include <dev/isa/isavar.h>
     37 
     38 #include <mips/bonito/bonitoreg.h>
     39 #include <mips/bonito/bonitovar.h>
     40 
     41 #include <evbmips/loongson/loongson_isa.h>
     42 
     43 uint	loongson_isaimr;
     44 
     45 void
     46 loongson_set_isa_imr(uint newimr)
     47 {
     48 	uint imr1, imr2;
     49 
     50 	imr1 = 0xff & ~newimr;
     51 	imr1 &= ~(1 << 2);	/* enable cascade */
     52 	imr2 = 0xff & ~(newimr >> 8);
     53 
     54 	/*
     55 	 * For some reason, trying to write the same value to the PIC
     56 	 * registers causes an immediate system freeze (at least on the
     57 	 * 2F and CS5536 based Lemote Yeeloong), so we only do this if
     58 	 * the value changes.
     59 	 * Note that interrupts have been disabled by the caller.
     60 	 */
     61 	//if ((newimr ^ loongson_isaimr) & 0xff00)
     62 		REGVAL8(BONITO_PCIIO_BASE + IO_ICU2 + 1) = imr2;
     63 	//if ((newimr ^ loongson_isaimr) & 0x00ff)
     64 		REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + 1) = imr1;
     65 	__asm__ __volatile__ ("sync" ::: "memory");
     66 	loongson_isaimr = newimr;
     67 }
     68 
     69 void
     70 loongson_isa_specific_eoi(int bit)
     71 {
     72 	KASSERT((bit < 16) && (bit >= 0));
     73 	loongson_isaimr &= ~(1 << bit);
     74 	if (bit & 8) {
     75 		(void)REGVAL8(BONITO_PCIIO_BASE + IO_ICU2 + 1);
     76 		REGVAL8(BONITO_PCIIO_BASE + IO_ICU2 + 1) =
     77 		    (0xff & ~(loongson_isaimr >> 8));
     78 		__asm__ __volatile__ ("sync" ::: "memory");
     79 		REGVAL8(BONITO_PCIIO_BASE + IO_ICU2 + PIC_OCW2) =
     80 		    OCW2_SELECT | OCW2_EOI | OCW2_SL | OCW2_ILS(bit & 7);
     81 		bit = 2;
     82 		__asm__ __volatile__ ("sync" ::: "memory");
     83 	}
     84 	(void)REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + 1);
     85 	REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + 1) =
     86 	    (0xff & ~(loongson_isaimr));
     87 	__asm__ __volatile__ ("sync" ::: "memory");
     88 	REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_OCW2) =
     89 	    OCW2_SELECT | OCW2_EOI | OCW2_SL | OCW2_ILS(bit);
     90 	__asm__ __volatile__ ("sync" ::: "memory");
     91 }
     92