1 /* $NetBSD: timing_generator.h,v 1.2 2021/12/18 23:45:05 riastradh Exp $ */ 2 3 /* 4 * Copyright 2012-15 Advanced Micro Devices, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: AMD 25 * 26 */ 27 28 #ifndef __DAL_TIMING_GENERATOR_TYPES_H__ 29 #define __DAL_TIMING_GENERATOR_TYPES_H__ 30 31 #include "hw_shared.h" 32 33 struct dc_bios; 34 35 /* Contains CRTC vertical/horizontal pixel counters */ 36 struct crtc_position { 37 int32_t vertical_count; 38 int32_t horizontal_count; 39 int32_t nominal_vcount; 40 }; 41 42 struct dcp_gsl_params { 43 int gsl_group; 44 int gsl_master; 45 }; 46 47 struct gsl_params { 48 int gsl0_en; 49 int gsl1_en; 50 int gsl2_en; 51 int gsl_master_en; 52 int gsl_master_mode; 53 int master_update_lock_gsl_en; 54 int gsl_window_start_x; 55 int gsl_window_end_x; 56 int gsl_window_start_y; 57 int gsl_window_end_y; 58 }; 59 60 /* define the structure of Dynamic Refresh Mode */ 61 struct drr_params { 62 uint32_t vertical_total_min; 63 uint32_t vertical_total_max; 64 uint32_t vertical_total_mid; 65 uint32_t vertical_total_mid_frame_num; 66 bool immediate_flip; 67 }; 68 69 #define LEFT_EYE_3D_PRIMARY_SURFACE 1 70 #define RIGHT_EYE_3D_PRIMARY_SURFACE 0 71 72 enum crtc_state { 73 CRTC_STATE_VBLANK = 0, 74 CRTC_STATE_VACTIVE 75 }; 76 77 struct vupdate_keepout_params { 78 int start_offset; 79 int end_offset; 80 int enable; 81 }; 82 83 struct crtc_stereo_flags { 84 uint8_t PROGRAM_STEREO : 1; 85 uint8_t PROGRAM_POLARITY : 1; 86 uint8_t RIGHT_EYE_POLARITY : 1; 87 uint8_t FRAME_PACKED : 1; 88 uint8_t DISABLE_STEREO_DP_SYNC : 1; 89 }; 90 91 enum crc_selection { 92 /* Order must match values expected by hardware */ 93 UNION_WINDOW_A_B = 0, 94 UNION_WINDOW_A_NOT_B, 95 UNION_WINDOW_NOT_A_B, 96 UNION_WINDOW_NOT_A_NOT_B, 97 INTERSECT_WINDOW_A_B, 98 INTERSECT_WINDOW_A_NOT_B, 99 INTERSECT_WINDOW_NOT_A_B, 100 INTERSECT_WINDOW_NOT_A_NOT_B, 101 }; 102 103 enum h_timing_div_mode { 104 H_TIMING_NO_DIV, 105 H_TIMING_DIV_BY2, 106 }; 107 108 struct crc_params { 109 /* Regions used to calculate CRC*/ 110 uint16_t windowa_x_start; 111 uint16_t windowa_x_end; 112 uint16_t windowa_y_start; 113 uint16_t windowa_y_end; 114 115 uint16_t windowb_x_start; 116 uint16_t windowb_x_end; 117 uint16_t windowb_y_start; 118 uint16_t windowb_y_end; 119 120 enum crc_selection selection; 121 122 bool continuous_mode; 123 bool enable; 124 }; 125 126 struct timing_generator { 127 const struct timing_generator_funcs *funcs; 128 struct dc_bios *bp; 129 struct dc_context *ctx; 130 int inst; 131 }; 132 133 struct dc_crtc_timing; 134 135 struct drr_params; 136 137 138 struct timing_generator_funcs { 139 bool (*validate_timing)(struct timing_generator *tg, 140 const struct dc_crtc_timing *timing); 141 void (*program_timing)(struct timing_generator *tg, 142 const struct dc_crtc_timing *timing, 143 int vready_offset, 144 int vstartup_start, 145 int vupdate_offset, 146 int vupdate_width, 147 const enum signal_type signal, 148 bool use_vbios 149 ); 150 void (*setup_vertical_interrupt0)( 151 struct timing_generator *optc, 152 uint32_t start_line, 153 uint32_t end_line); 154 void (*setup_vertical_interrupt1)( 155 struct timing_generator *optc, 156 uint32_t start_line); 157 void (*setup_vertical_interrupt2)( 158 struct timing_generator *optc, 159 uint32_t start_line); 160 161 bool (*enable_crtc)(struct timing_generator *tg); 162 bool (*disable_crtc)(struct timing_generator *tg); 163 bool (*is_counter_moving)(struct timing_generator *tg); 164 void (*get_position)(struct timing_generator *tg, 165 struct crtc_position *position); 166 167 uint32_t (*get_frame_count)(struct timing_generator *tg); 168 void (*get_scanoutpos)( 169 struct timing_generator *tg, 170 uint32_t *v_blank_start, 171 uint32_t *v_blank_end, 172 uint32_t *h_position, 173 uint32_t *v_position); 174 bool (*get_otg_active_size)(struct timing_generator *optc, 175 uint32_t *otg_active_width, 176 uint32_t *otg_active_height); 177 bool (*is_matching_timing)(struct timing_generator *tg, 178 const struct dc_crtc_timing *otg_timing); 179 void (*set_early_control)(struct timing_generator *tg, 180 uint32_t early_cntl); 181 void (*wait_for_state)(struct timing_generator *tg, 182 enum crtc_state state); 183 void (*set_blank)(struct timing_generator *tg, 184 bool enable_blanking); 185 bool (*is_blanked)(struct timing_generator *tg); 186 void (*set_overscan_blank_color) (struct timing_generator *tg, const struct tg_color *color); 187 void (*set_blank_color)(struct timing_generator *tg, const struct tg_color *color); 188 void (*set_colors)(struct timing_generator *tg, 189 const struct tg_color *blank_color, 190 const struct tg_color *overscan_color); 191 192 void (*disable_vga)(struct timing_generator *tg); 193 bool (*did_triggered_reset_occur)(struct timing_generator *tg); 194 void (*setup_global_swap_lock)(struct timing_generator *tg, 195 const struct dcp_gsl_params *gsl_params); 196 void (*unlock)(struct timing_generator *tg); 197 void (*lock)(struct timing_generator *tg); 198 void (*lock_doublebuffer_disable)(struct timing_generator *tg); 199 void (*lock_doublebuffer_enable)(struct timing_generator *tg); 200 void(*triplebuffer_unlock)(struct timing_generator *tg); 201 void(*triplebuffer_lock)(struct timing_generator *tg); 202 void (*enable_reset_trigger)(struct timing_generator *tg, 203 int source_tg_inst); 204 void (*enable_crtc_reset)(struct timing_generator *tg, 205 int source_tg_inst, 206 struct crtc_trigger_info *crtc_tp); 207 void (*disable_reset_trigger)(struct timing_generator *tg); 208 void (*tear_down_global_swap_lock)(struct timing_generator *tg); 209 void (*enable_advanced_request)(struct timing_generator *tg, 210 bool enable, const struct dc_crtc_timing *timing); 211 void (*set_drr)(struct timing_generator *tg, const struct drr_params *params); 212 void (*set_static_screen_control)(struct timing_generator *tg, 213 uint32_t event_triggers, 214 uint32_t num_frames); 215 void (*set_test_pattern)( 216 struct timing_generator *tg, 217 enum controller_dp_test_pattern test_pattern, 218 enum dc_color_depth color_depth); 219 220 bool (*arm_vert_intr)(struct timing_generator *tg, uint8_t width); 221 222 void (*program_global_sync)(struct timing_generator *tg, 223 int vready_offset, 224 int vstartup_start, 225 int vupdate_offset, 226 int vupdate_width); 227 void (*enable_optc_clock)(struct timing_generator *tg, bool enable); 228 void (*program_stereo)(struct timing_generator *tg, 229 const struct dc_crtc_timing *timing, struct crtc_stereo_flags *flags); 230 bool (*is_stereo_left_eye)(struct timing_generator *tg); 231 232 void (*set_blank_data_double_buffer)(struct timing_generator *tg, bool enable); 233 234 void (*tg_init)(struct timing_generator *tg); 235 bool (*is_tg_enabled)(struct timing_generator *tg); 236 bool (*is_optc_underflow_occurred)(struct timing_generator *tg); 237 void (*clear_optc_underflow)(struct timing_generator *tg); 238 239 void (*set_dwb_source)(struct timing_generator *optc, 240 uint32_t dwb_pipe_inst); 241 242 void (*get_optc_source)(struct timing_generator *optc, 243 uint32_t *num_of_input_segments, 244 uint32_t *seg0_src_sel, 245 uint32_t *seg1_src_sel); 246 247 /** 248 * Configure CRCs for the given timing generator. Return false if TG is 249 * not on. 250 */ 251 bool (*configure_crc)(struct timing_generator *tg, 252 const struct crc_params *params); 253 254 /** 255 * Get CRCs for the given timing generator. Return false if CRCs are 256 * not enabled (via configure_crc). 257 */ 258 bool (*get_crc)(struct timing_generator *tg, 259 uint32_t *r_cr, uint32_t *g_y, uint32_t *b_cb); 260 261 void (*program_manual_trigger)(struct timing_generator *optc); 262 void (*setup_manual_trigger)(struct timing_generator *optc); 263 bool (*get_hw_timing)(struct timing_generator *optc, 264 struct dc_crtc_timing *hw_crtc_timing); 265 266 void (*set_vtg_params)(struct timing_generator *optc, 267 const struct dc_crtc_timing *dc_crtc_timing); 268 269 void (*set_dsc_config)(struct timing_generator *optc, 270 enum optc_dsc_mode dsc_mode, 271 uint32_t dsc_bytes_per_pixel, 272 uint32_t dsc_slice_width); 273 void (*set_odm_bypass)(struct timing_generator *optc, const struct dc_crtc_timing *dc_crtc_timing); 274 void (*set_odm_combine)(struct timing_generator *optc, int *opp_id, int opp_cnt, 275 struct dc_crtc_timing *timing); 276 void (*set_gsl)(struct timing_generator *optc, const struct gsl_params *params); 277 void (*set_gsl_source_select)(struct timing_generator *optc, 278 int group_idx, 279 uint32_t gsl_ready_signal); 280 }; 281 282 #endif 283
Indexes created Sun Sep 21 20:09:37 GMT 2025