| /src/sys/external/bsd/drm2/include/linux/ |
| cpufreq.h | 43 unsigned int max_freq; member in struct:cpufreq_policy::__anon708a85770108
51 policy->cpuinfo.max_freq = cpufreq_get(curcpu());
|
| /src/sys/external/bsd/drm2/dist/drm/i915/gt/ |
| debugfs_gt_pm.c | 292 intel_gpu_freq(rps, rps->max_freq));
311 int max_freq; local in function:frequency_show
420 max_freq = (IS_GEN9_LP(i915) ? rp_state_cap >> 0 :
422 max_freq *= (IS_GEN9_BC(i915) ||
425 intel_gpu_freq(rps, max_freq));
427 max_freq = (rp_state_cap & 0xff00) >> 8;
428 max_freq *= (IS_GEN9_BC(i915) ||
431 intel_gpu_freq(rps, max_freq));
433 max_freq = (IS_GEN9_LP(i915) ? rp_state_cap >> 16 :
435 max_freq *= (IS_GEN9_BC(i915) |
[all...] |
| intel_rps_types.h | 66 u8 max_freq; /* Maximum frequency, RP0 if not overclocking */ member in struct:intel_rps
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/subdev/bios/ |
| pll.h | 67 u32 max_freq; member in struct:nvbios_pll::__anonee8a8dd00408
|
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/ |
| amdgpu_renoir_ppt.c | 417 uint32_t min_freq, max_freq, force_freq; local in function:renoir_force_dpm_limit_value
428 ret = smu_get_dpm_freq_range(smu, clk_type, &min_freq, &max_freq, false);
432 force_freq = highest ? max_freq : min_freq;
444 uint32_t min_freq, max_freq; local in function:renoir_unforce_dpm_levels
462 ret = smu_get_dpm_freq_range(smu, clk_type, &min_freq, &max_freq, false);
466 ret = smu_set_soft_freq_range(smu, clk_type, min_freq, max_freq);
613 uint32_t soft_min_level = 0, soft_max_level = 0, min_freq = 0, max_freq = 0; local in function:renoir_force_clk_levels
627 ret = smu_get_dpm_freq_range(smu, SMU_GFXCLK, &min_freq, &max_freq, false);
632 soft_max_level == 1 ? RENOIR_UMD_PSTATE_GFXCLK : max_freq);
636 soft_min_level == 2 ? max_freq
[all...] |
| amdgpu_navi10_ppt.c | 955 uint32_t soft_min_level = 0, soft_max_level = 0, min_freq = 0, max_freq = 0; local in function:navi10_force_clk_levels
978 ret = smu_get_dpm_freq_by_index(smu, clk_type, soft_max_level, &max_freq);
982 ret = smu_set_soft_freq_range(smu, clk_type, min_freq, max_freq);
1052 uint32_t max_freq = 0; local in function:navi10_pre_display_config_changed
1059 ret = smu_get_dpm_freq_range(smu, SMU_UCLK, NULL, &max_freq, false);
1062 ret = smu_set_hard_freq_range(smu, SMU_UCLK, 0, max_freq);
1098 uint32_t min_freq, max_freq, force_freq; local in function:navi10_force_dpm_limit_value
1109 ret = smu_get_dpm_freq_range(smu, clk_type, &min_freq, &max_freq, false);
1113 force_freq = highest ? max_freq : min_freq;
1125 uint32_t min_freq, max_freq; local in function:navi10_unforce_dpm_levels
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
| amdgpu_vega12_hwmgr.c | 1129 uint32_t max_freq; local in function:vega12_upload_dpm_max_level
1133 max_freq = data->dpm_table.gfx_table.dpm_state.soft_max_level;
1137 (PPCLK_GFXCLK << 16) | (max_freq & 0xffff))),
1143 max_freq = data->dpm_table.mem_table.dpm_state.soft_max_level;
1147 (PPCLK_UCLK << 16) | (max_freq & 0xffff))),
1153 max_freq = data->dpm_table.vclk_table.dpm_state.soft_max_level;
1157 (PPCLK_VCLK << 16) | (max_freq & 0xffff))),
1161 max_freq = data->dpm_table.dclk_table.dpm_state.soft_max_level;
1164 (PPCLK_DCLK << 16) | (max_freq & 0xffff))),
1170 max_freq = data->dpm_table.eclk_table.dpm_state.soft_max_level
[all...] |
| amdgpu_vega20_hwmgr.c | 1900 uint32_t max_freq; local in function:vega20_upload_dpm_max_level
1905 max_freq = data->dpm_table.gfx_table.dpm_state.soft_max_level;
1909 (PPCLK_GFXCLK << 16) | (max_freq & 0xffff))),
1916 max_freq = data->dpm_table.mem_table.dpm_state.soft_max_level;
1920 (PPCLK_UCLK << 16) | (max_freq & 0xffff))),
1927 max_freq = data->dpm_table.vclk_table.dpm_state.soft_max_level;
1931 (PPCLK_VCLK << 16) | (max_freq & 0xffff))),
1935 max_freq = data->dpm_table.dclk_table.dpm_state.soft_max_level;
1938 (PPCLK_DCLK << 16) | (max_freq & 0xffff))),
1945 max_freq = data->dpm_table.eclk_table.dpm_state.soft_max_level
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/i915/ |
| i915_debugfs.c | 835 intel_gpu_freq(rps, rps->max_freq));
855 int max_freq; local in function:i915_frequency_info
964 max_freq = (IS_GEN9_LP(dev_priv) ? rp_state_cap >> 0 :
966 max_freq *= (IS_GEN9_BC(dev_priv) ||
969 intel_gpu_freq(rps, max_freq));
971 max_freq = (rp_state_cap & 0xff00) >> 8;
972 max_freq *= (IS_GEN9_BC(dev_priv) ||
975 intel_gpu_freq(rps, max_freq));
977 max_freq = (IS_GEN9_LP(dev_priv) ? rp_state_cap >> 16 :
979 max_freq *= (IS_GEN9_BC(dev_priv) |
[all...] |
