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      1 /*	$NetBSD: cpuvar.h,v 1.21 2020/07/06 10:54:56 rin Exp $	*/
      2 /*-
      3  * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
      4  * All rights reserved.
      5  *
      6  * This code is derived from software contributed to The NetBSD Foundation
      7  * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects
      8  * Agency and which was developed by Matt Thomas of 3am Software Foundry.
      9  *
     10  * This material is based upon work supported by the Defense Advanced Research
     11  * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under
     12  * Contract No. N66001-09-C-2073.
     13  * Approved for Public Release, Distribution Unlimited
     14  *
     15  * Redistribution and use in source and binary forms, with or without
     16  * modification, are permitted provided that the following conditions
     17  * are met:
     18  * 1. Redistributions of source code must retain the above copyright
     19  *    notice, this list of conditions and the following disclaimer.
     20  * 2. Redistributions in binary form must reproduce the above copyright
     21  *    notice, this list of conditions and the following disclaimer in the
     22  *    documentation and/or other materials provided with the distribution.
     23  *
     24  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     25  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     26  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     27  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     28  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     29  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     30  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     31  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     32  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     33  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     34  * POSSIBILITY OF SUCH DAMAGE.
     35  */
     36 
     37 #ifndef _POWERPC_BOOKE_CPUVAR_H_
     38 #define _POWERPC_BOOKE_CPUVAR_H_
     39 
     40 #ifdef _KERNEL_OPT
     41 #include "opt_multiprocessor.h"
     42 #endif
     43 
     44 #include <sys/bus.h>
     45 #include <prop/proplib.h>
     46 #include <powerpc/psl.h>
     47 
     48 struct cpunode_softc {
     49 	device_t sc_dev;
     50 	u_int sc_children;
     51 };
     52 
     53 struct cpu_softc {
     54 	struct cpu_info *cpu_ci;
     55 	struct evcnt *cpu_evcnt_intrs;
     56 	bus_space_tag_t cpu_bst;
     57 	bus_space_tag_t cpu_le_bst;
     58 	bus_space_handle_t cpu_bsh;
     59 	bus_addr_t cpu_clock_gtbcr;
     60 
     61 	paddr_t cpu_highmem;
     62 
     63 	u_int cpu_pcpls[5];
     64 	struct evcnt cpu_evcnt_spurious_intr;
     65 
     66 	struct evcnt cpu_ev_late_clock;
     67 	u_long cpu_ticks_per_clock_intr;
     68 	struct evcnt cpu_ev_exec_trap_sync;
     69 
     70 	uint64_t cpu_spl_tb[NIPL][NIPL];
     71 };
     72 
     73 struct cpunode_locators {
     74 	const char *cnl_name;
     75 	bus_addr_t cnl_addr;
     76 	bus_size_t cnl_size;
     77 	uint8_t cnl_instance;
     78 	uint8_t cnl_nintr;
     79 	uint8_t cnl_intrs[4];
     80 	uint32_t cnl_flags;
     81 	uint16_t cnl_ids[6];
     82 };
     83 
     84 struct cpunode_attach_args {
     85 	const char *cna_busname;
     86 	bus_space_tag_t cna_memt;
     87 	bus_space_tag_t cna_le_memt;
     88 	bus_dma_tag_t cna_dmat;
     89 	struct cpunode_locators cna_locs;
     90 	u_int cna_childmask;
     91 };
     92 
     93 struct mainbus_attach_args {
     94 	const char *ma_name;
     95 	bus_space_tag_t ma_memt;
     96 	bus_space_tag_t ma_le_memt;
     97 	bus_dma_tag_t ma_dmat;
     98 	int ma_node;
     99 };
    100 
    101 struct generic_attach_args {
    102 	const char *ga_name;
    103 	bus_space_tag_t ga_bst;
    104 	bus_dma_tag_t ga_dmat;
    105 	bus_addr_t ga_addr;
    106 	bus_size_t ga_size;
    107 	int ga_cs;
    108 	int ga_irq;
    109 };
    110 
    111 #ifndef __BSD_PT_ENTRY_T
    112 #define __BSD_PT_ENTRY_T	__uint32_t
    113 typedef __BSD_PT_ENTRY_T	pt_entry_t;
    114 #define PRIxPTE			PRIx32
    115 #endif
    116 
    117 #include <uvm/pmap/tlb.h>
    118 
    119 struct tlb_md_io_ops {
    120 	/*
    121 	 * We need mapiodev to be first so we can easily override it in
    122 	 * early boot by doing cpu_md_ops.tlb_md_ops = (const struct
    123 	 * tlb_md_ops *) &<variable containing mapiodev pointer>.
    124 	 */
    125 	void *(*md_tlb_mapiodev)(paddr_t, psize_t, bool);
    126 	void (*md_tlb_unmapiodev)(vaddr_t, vsize_t);
    127 	int (*md_tlb_ioreserve)(vaddr_t, vsize_t, uint32_t);
    128 	int (*md_tlb_iorelease)(vaddr_t);
    129 };
    130 
    131 struct cpu_md_ops {
    132 	const struct cpunode_locators *md_cpunode_locs;
    133 	void (*md_cpu_attach)(device_t, u_int);
    134 
    135 	void (*md_device_register)(device_t, void *);
    136 	void (*md_cpu_startup)(void);
    137 	void (*md_cpu_reset)(void);
    138 	void (*md_cpunode_attach)(device_t, device_t, void *);
    139 
    140 	const struct tlb_md_ops *md_tlb_ops;
    141 	const struct tlb_md_io_ops *md_tlb_io_ops;
    142 };
    143 
    144 
    145 #ifdef _KERNEL
    146 
    147 static __inline register_t
    148 wrtee(register_t msr)
    149 {
    150 	register_t old_msr;
    151 	__asm("mfmsr\t%0" : "=r"(old_msr));
    152 
    153 	if (__builtin_constant_p(msr)) {
    154 		__asm __volatile("wrteei\t%0" :: "n"((msr & PSL_EE) ? 1 : 0));
    155 	} else {
    156 		__asm __volatile("wrtee\t%0" :: "r"(msr));
    157 	}
    158 	return old_msr;
    159 }
    160 
    161 struct trapframe;
    162 void	booke_sstep(struct trapframe *);
    163 
    164 void	booke_cpu_startup(const char *);	/* model name */
    165 extern struct powerpc_bus_dma_tag booke_bus_dma_tag;
    166 
    167 extern struct cpu_info cpu_info[];
    168 #ifdef MULTIPROCESSOR
    169 extern volatile struct cpu_hatch_data cpu_hatch_data;
    170 #endif
    171 
    172 void	cpu_evcnt_attach(struct cpu_info *);
    173 uint32_t cpu_read_4(bus_size_t);
    174 uint8_t	cpu_read_1(bus_size_t);
    175 void	cpu_write_4(bus_size_t, uint32_t);
    176 void	cpu_write_1(bus_size_t, uint8_t);
    177 
    178 void	dump_splhist(struct cpu_info *, void (*)(const char *, ...));
    179 void	calc_delayconst(void);
    180 
    181 struct intrsw;
    182 void	exception_init(const struct intrsw *);
    183 
    184 void	*tlb_mapiodev(paddr_t, psize_t, bool);
    185 void	tlb_unmapiodev(vaddr_t, vsize_t);
    186 int	tlb_ioreserve(vaddr_t, vsize_t, pt_entry_t);
    187 int	tlb_iorelease(vaddr_t);
    188 
    189 extern struct cpu_md_ops cpu_md_ops;
    190 
    191 void	board_info_init(void);
    192 void	board_info_add_number(const char *, uint64_t);
    193 void	board_info_add_data(const char *, const void *, size_t);
    194 void	board_info_add_string(const char *, const char *);
    195 void	board_info_add_bool(const char *);
    196 void	board_info_add_object(const char *, void *);
    197 uint64_t board_info_get_number(const char *);
    198 bool	board_info_get_bool(const char *);
    199 void	*board_info_get_object(const char *);
    200 const void *
    201 	board_info_get_data(const char *, size_t *);
    202 
    203 /* trap.c */
    204 void	dump_trapframe(const struct trapframe *, void (*)(const char *, ...));
    205 
    206 extern char root_string[];
    207 extern paddr_t msgbuf_paddr;
    208 extern prop_dictionary_t board_properties;
    209 extern psize_t pmemsize;
    210 #endif
    211 
    212 #endif /* !_POWERPC_BOOKE_CPUVAR_H_ */
    213