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      1 /*	$NetBSD: amdgpu_ras_eeprom.h,v 1.2 2021/12/18 23:44:58 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright 2019 Advanced Micro Devices, Inc.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the "Software"),
      8  * to deal in the Software without restriction, including without limitation
      9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  * and/or sell copies of the Software, and to permit persons to whom the
     11  * Software is furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice shall be included in
     14  * all copies or substantial portions of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22  * OTHER DEALINGS IN THE SOFTWARE.
     23  *
     24  */
     25 
     26 #ifndef _AMDGPU_RAS_EEPROM_H
     27 #define _AMDGPU_RAS_EEPROM_H
     28 
     29 #include <linux/i2c.h>
     30 
     31 struct amdgpu_device;
     32 
     33 enum amdgpu_ras_eeprom_err_type{
     34 	AMDGPU_RAS_EEPROM_ERR_PLACE_HOLDER,
     35 	AMDGPU_RAS_EEPROM_ERR_RECOVERABLE,
     36 	AMDGPU_RAS_EEPROM_ERR_NON_RECOVERABLE
     37 };
     38 
     39 struct amdgpu_ras_eeprom_table_header {
     40 	uint32_t header;
     41 	uint32_t version;
     42 	uint32_t first_rec_offset;
     43 	uint32_t tbl_size;
     44 	uint32_t checksum;
     45 }__attribute__((__packed__));
     46 
     47 struct amdgpu_ras_eeprom_control {
     48 	struct amdgpu_ras_eeprom_table_header tbl_hdr;
     49 	struct i2c_adapter eeprom_accessor;
     50 	uint32_t next_addr;
     51 	unsigned int num_recs;
     52 	struct mutex tbl_mutex;
     53 	bool bus_locked;
     54 	uint32_t tbl_byte_sum;
     55 	uint16_t i2c_address; // 8-bit represented address
     56 };
     57 
     58 /*
     59  * Represents single table record. Packed to be easily serialized into byte
     60  * stream.
     61  */
     62 struct eeprom_table_record {
     63 
     64 	union {
     65 		uint64_t address;
     66 		uint64_t offset;
     67 	};
     68 
     69 	uint64_t retired_page;
     70 	uint64_t ts;
     71 
     72 	enum amdgpu_ras_eeprom_err_type err_type;
     73 
     74 	union {
     75 		unsigned char bank;
     76 		unsigned char cu;
     77 	};
     78 
     79 	unsigned char mem_channel;
     80 	unsigned char mcumc_id;
     81 }__attribute__((__packed__));
     82 
     83 int amdgpu_ras_eeprom_init(struct amdgpu_ras_eeprom_control *control);
     84 void amdgpu_ras_eeprom_fini(struct amdgpu_ras_eeprom_control *control);
     85 int amdgpu_ras_eeprom_reset_table(struct amdgpu_ras_eeprom_control *control);
     86 
     87 int amdgpu_ras_eeprom_process_recods(struct amdgpu_ras_eeprom_control *control,
     88 					    struct eeprom_table_record *records,
     89 					    bool write,
     90 					    int num);
     91 
     92 void amdgpu_ras_eeprom_test(struct amdgpu_ras_eeprom_control *control);
     93 
     94 #endif // _AMDGPU_RAS_EEPROM_H
     95