1 /* $NetBSD: memreg.c,v 1.45 2012/07/29 00:04:05 matt Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * This product includes software developed by Harvard University. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions 19 * are met: 20 * 1. Redistributions of source code must retain the above copyright 21 * notice, this list of conditions and the following disclaimer. 22 * 2. Redistributions in binary form must reproduce the above copyright 23 * notice, this list of conditions and the following disclaimer in the 24 * documentation and/or other materials provided with the distribution. 25 * 3. All advertising materials mentioning features or use of this software 26 * must display the following acknowledgement: 27 * This product includes software developed by the University of 28 * California, Berkeley and its contributors. 29 * This product includes software developed by Harvard University. 30 * 4. Neither the name of the University nor the names of its contributors 31 * may be used to endorse or promote products derived from this software 32 * without specific prior written permission. 33 * 34 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 35 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 36 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 37 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 38 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 39 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 40 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 41 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 42 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 43 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 44 * SUCH DAMAGE. 45 * 46 * @(#)memreg.c 8.1 (Berkeley) 6/11/93 47 */ 48 49 #include <sys/cdefs.h> 50 __KERNEL_RCSID(0, "$NetBSD: memreg.c,v 1.45 2012/07/29 00:04:05 matt Exp $"); 51 52 #include "opt_sparc_arch.h" 53 54 #include <sys/param.h> 55 #include <sys/systm.h> 56 #include <sys/proc.h> 57 #include <sys/device.h> 58 59 #include <machine/autoconf.h> 60 #include <machine/ctlreg.h> 61 62 #include <sparc/sparc/memreg.h> 63 #include <sparc/sparc/vaddrs.h> 64 #include <sparc/sparc/asm.h> 65 #include <sparc/sparc/cpuvar.h> 66 67 #include <machine/pte.h> 68 #include <machine/reg.h> /* for trapframe */ 69 #include <machine/trap.h> /* for trap types */ 70 71 volatile u_int *par_err_reg; 72 73 static int memregmatch_mainbus(device_t, cfdata_t, void *); 74 static int memregmatch_obio(device_t, cfdata_t, void *); 75 static void memregattach_mainbus(device_t, device_t, void *); 76 static void memregattach_obio(device_t, device_t, void *); 77 78 CFATTACH_DECL_NEW(memreg_mainbus, 0, 79 memregmatch_mainbus, memregattach_mainbus, NULL, NULL); 80 81 CFATTACH_DECL_NEW(memreg_obio, 0, 82 memregmatch_obio, memregattach_obio, NULL, NULL); 83 84 #if defined(SUN4M) 85 static void hardmemerr4m(unsigned, u_int, u_int, u_int, u_int); 86 #endif 87 88 /* 89 * The OPENPROM calls this "memory-error". 90 */ 91 static int 92 memregmatch_mainbus(device_t parent, cfdata_t cf, void *aux) 93 { 94 struct mainbus_attach_args *ma = aux; 95 96 return (strcmp("memory-error", ma->ma_name) == 0); 97 } 98 99 static int 100 memregmatch_obio(device_t parent, cfdata_t cf, void *aux) 101 { 102 union obio_attach_args *uoba = aux; 103 104 if (uoba->uoba_isobio4 == 0) 105 return (strcmp("memory-error", uoba->uoba_sbus.sa_name) == 0); 106 107 if (!CPU_ISSUN4) { 108 printf("memregmatch_obio: attach args mixed up\n"); 109 return (0); 110 } 111 112 return (1); 113 } 114 115 /* ARGSUSED */ 116 static void 117 memregattach_mainbus(device_t parent, device_t self, void *aux) 118 { 119 struct mainbus_attach_args *ma = aux; 120 bus_space_handle_t bh; 121 122 printf("\n"); 123 if (ma->ma_promvaddr != 0) { 124 par_err_reg = (volatile int *)ma->ma_promvaddr; 125 return; 126 } 127 128 if (bus_space_map(ma->ma_bustag, 129 ma->ma_paddr, 130 sizeof(par_err_reg), 131 BUS_SPACE_MAP_LINEAR, 132 &bh) != 0) { 133 printf("memregattach_mainbus: can't map register\n"); 134 return; 135 } 136 par_err_reg = (volatile int *)bh; 137 } 138 139 /* ARGSUSED */ 140 static void 141 memregattach_obio(device_t parent, device_t self, void *aux) 142 { 143 union obio_attach_args *uoba = aux; 144 bus_space_handle_t bh; 145 146 if (uoba->uoba_isobio4 == 0) { 147 struct sbus_attach_args *sa = &uoba->uoba_sbus; 148 if (sa->sa_promvaddr != 0) { 149 par_err_reg = (volatile int *)sa->sa_promvaddr; 150 return; 151 } 152 153 if (sbus_bus_map(sa->sa_bustag, 154 sa->sa_slot, sa->sa_offset, 155 sizeof(par_err_reg), 156 BUS_SPACE_MAP_LINEAR, &bh) != 0) { 157 printf("memregattach_obio: can't map register\n"); 158 return; 159 } 160 par_err_reg = (volatile int *)bh; 161 } 162 163 /* On sun4, `par_err_reg' has already been mapped in autoconf.c */ 164 if (par_err_reg == NULL) 165 panic("memregattach"); 166 167 printf("\n"); 168 } 169 170 /* 171 * Synchronous and asynchronous memory error handler. 172 * (This is the level 15 interrupt, which is not vectored.) 173 * Should kill the process that got its bits clobbered, 174 * and take the page out of the page pool, but for now... 175 */ 176 177 void 178 memerr4_4c(unsigned int issync, 179 u_int ser, u_int sva, u_int aer, u_int ava, 180 struct trapframe *tf) /* XXX - unused/invalid */ 181 { 182 char bits[64]; 183 u_int pte; 184 185 snprintb(bits, sizeof(bits), SER_BITS, ser); 186 printf("%ssync mem arr: ser=%s sva=0x%x ", 187 issync ? "" : "a", bits, sva); 188 snprintb(bits, sizeof(bits), AER_BITS, aer & 0xff); 189 printf("aer=%s ava=0x%x\n", bits, ava); 190 191 pte = getpte4(sva); 192 if ((pte & PG_V) != 0 && (pte & PG_TYPE) == PG_OBMEM) { 193 u_int pa = (pte & PG_PFNUM) << PGSHIFT; 194 printf(" spa=0x%x, module location: %s\n", pa, 195 prom_pa_location(pa, 0)); 196 } 197 198 pte = getpte4(ava); 199 if ((pte & PG_V) != 0 && (pte & PG_TYPE) == PG_OBMEM) { 200 u_int pa = (pte & PG_PFNUM) << PGSHIFT; 201 printf(" apa=0x%x, module location: %s\n", pa, 202 prom_pa_location(pa, 0)); 203 } 204 205 if (par_err_reg) { 206 snprintb(bits, sizeof(bits), PER_BITS, *par_err_reg); 207 printf("parity error register = %s\n", bits); 208 } 209 panic("memory error"); /* XXX */ 210 } 211 212 213 #if defined(SUN4M) 214 /* 215 * hardmemerr4m: called upon fatal memory error. Print a message and panic. 216 */ 217 static void 218 hardmemerr4m(unsigned type, u_int sfsr, u_int sfva, u_int afsr, u_int afva) 219 { 220 char bits[64]; 221 222 printf("memory fault: type %d", type); 223 snprintb(bits, sizeof(bits), SFSR_BITS, sfsr); 224 printf("sfsr=%s sfva=0x%x\n", bits, sfva); 225 226 if (afsr != 0) { 227 snprintb(bits, sizeof(bits), AFSR_BITS, afsr); 228 printf("; afsr=%s afva=0x%x%x\n", bits, 229 (afsr & AFSR_AFA) >> AFSR_AFA_RSHIFT, afva); 230 } 231 232 if ((sfsr & SFSR_FT) == SFSR_FT_NONE && (afsr & AFSR_AFO) == 0) 233 return; 234 235 panic("hard memory error"); 236 } 237 238 /* 239 * Memerr4m: handle a non-trivial memory fault. These include HyperSPARC 240 * asynchronous faults, SuperSPARC store-buffer copyback failures, and 241 * data faults without a valid faulting VA. We try to retry the operation 242 * once, and then fail if we get called again. 243 */ 244 245 /* XXXSMP */ 246 static int addrold = (int) 0xdeadbeef; /* We pick an unlikely address */ 247 static int addroldtop = (int) 0xdeadbeef; 248 static int oldtype = -1; 249 /* XXXSMP */ 250 251 void 252 hypersparc_memerr(unsigned type, u_int sfsr, u_int sfva, struct trapframe *tf) 253 { 254 u_int afsr; 255 u_int afva; 256 257 KERNEL_LOCK(1, NULL); 258 259 (*cpuinfo.get_asyncflt)(&afsr, &afva); 260 if ((afsr & AFSR_AFO) != 0) { /* HS async fault! */ 261 262 printf("HyperSPARC async cache memory failure at phys 0x%x%x\n", 263 (afsr & AFSR_AFA) >> AFSR_AFA_RSHIFT, afva); 264 265 if (afva == addrold && (afsr & AFSR_AFA) == addroldtop) 266 goto hard; 267 268 oldtype = -1; 269 addrold = afva; 270 addroldtop = afsr & AFSR_AFA; 271 } 272 out: 273 KERNEL_UNLOCK_ONE(NULL); 274 return; 275 276 hard: 277 hardmemerr4m(type, sfsr, sfva, afsr, afva); 278 goto out; 279 } 280 281 void 282 viking_memerr(unsigned type, u_int sfsr, u_int sfva, struct trapframe *tf) 283 { 284 u_int afsr=0; /* No Async fault registers on the viking */ 285 u_int afva=0; 286 287 KERNEL_LOCK(1, NULL); 288 289 if (type == T_STOREBUFFAULT) { 290 291 /* 292 * On Supersparc, we try to re-enable the store buffers 293 * to force a retry. 294 */ 295 printf("store buffer copy-back failure at 0x%x. Retrying...\n", 296 sfva); 297 298 if (oldtype == T_STOREBUFFAULT || addrold == sfva) 299 goto hard; 300 301 oldtype = T_STOREBUFFAULT; 302 addrold = sfva; 303 304 /* re-enable store buffer */ 305 sta(SRMMU_PCR, ASI_SRMMU, 306 lda(SRMMU_PCR, ASI_SRMMU) | VIKING_PCR_SB); 307 308 } else if (type == T_DATAFAULT && (sfsr & SFSR_FAV) == 0) { 309 /* 310 * bizarre. 311 * XXX: Should handle better. See SuperSPARC manual pg. 9-35 312 */ 313 printf("warning: got data fault with no faulting address." 314 " Ignoring.\n"); 315 316 if (oldtype == T_DATAFAULT) 317 goto hard; 318 oldtype = T_DATAFAULT; 319 } 320 321 out: 322 KERNEL_UNLOCK_ONE(NULL); 323 return; 324 325 hard: 326 hardmemerr4m(type, sfsr, sfva, afsr, afva); 327 goto out; 328 } 329 330 void 331 memerr4m(unsigned type, u_int sfsr, u_int sfva, struct trapframe *tf) 332 { 333 u_int afsr; 334 u_int afva; 335 336 KERNEL_LOCK(1, NULL); 337 338 /* 339 * No known special cases. 340 * Just get async registers, if any, and report the unhandled case. 341 */ 342 if ((*cpuinfo.get_asyncflt)(&afsr, &afva) != 0) 343 afsr = afva = 0; 344 345 hardmemerr4m(type, sfsr, sfva, afsr, afva); 346 KERNEL_UNLOCK_ONE(NULL); 347 } 348 #endif /* SUN4M */ 349
Indexes created Sat Sep 20 22:09:52 GMT 2025