| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| dcn10_hubp.h | 380 HUBP_SF(HUBPREQ0_DCN_GLOBAL_TTU_CNTL, MIN_TTU_VBLANK, mask_sh),\
587 type MIN_TTU_VBLANK;\
678 uint32_t min_ttu_vblank; member in struct:dcn_hubp_state
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/ |
| amdgpu_dml1_display_rq_dlg_calc.c | 1013 double min_ttu_vblank; local in function:dml1_rq_dlg_get_dlg_params
1152 min_ttu_vblank = dlg_sys_param.t_urg_wm_us;
1154 min_ttu_vblank = dml_max(dlg_sys_param.t_sr_wm_us, min_ttu_vblank);
1156 min_ttu_vblank = dml_max(dlg_sys_param.t_mclk_wm_us, min_ttu_vblank);
1157 min_ttu_vblank = min_ttu_vblank + t_calc_us;
1159 min_dst_y_ttu_vblank = min_ttu_vblank * pclk_freq_in_mhz / (double) htotal;
1167 DTRACE("DLG: %s: min_ttu_vblank = %3.2f", __func__, min_ttu_vblank)
[all...] |
| display_mode_structs.h | 474 unsigned int min_ttu_vblank; member in struct:_vcs_dpi_display_ttu_regs_st
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/ |
| amdgpu_display_rq_dlg_calc_20.c | 810 double min_ttu_vblank; local in function:dml20_rq_dlg_get_dlg_params
932 min_ttu_vblank = get_min_ttu_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx);
934 min_dst_y_ttu_vblank = min_ttu_vblank * pclk_freq_in_mhz / (double) htotal;
943 dml_print("DML_DLG: %s: min_ttu_vblank = %3.2f\n",
945 min_ttu_vblank);
1560 disp_ttu_regs->min_ttu_vblank = min_ttu_vblank * refclk_freq_in_mhz;
1561 ASSERT(disp_ttu_regs->min_ttu_vblank < dml_pow(2, 24));
|
| amdgpu_display_rq_dlg_calc_20v2.c | 810 double min_ttu_vblank; local in function:dml20v2_rq_dlg_get_dlg_params
932 min_ttu_vblank = get_min_ttu_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx);
934 min_dst_y_ttu_vblank = min_ttu_vblank * pclk_freq_in_mhz / (double) htotal;
944 dml_print("DML_DLG: %s: min_ttu_vblank = %3.2f\n",
946 min_ttu_vblank);
1561 disp_ttu_regs->min_ttu_vblank = min_ttu_vblank * refclk_freq_in_mhz;
1562 ASSERT(disp_ttu_regs->min_ttu_vblank < dml_pow(2, 24));
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/ |
| amdgpu_display_rq_dlg_calc_21.c | 856 double min_ttu_vblank; local in function:dml_rq_dlg_get_dlg_params
978 min_ttu_vblank = get_min_ttu_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx);
980 min_dst_y_ttu_vblank = min_ttu_vblank * pclk_freq_in_mhz / (double) htotal;
991 "DML_DLG: %s: min_ttu_vblank = %3.2f\n",
993 min_ttu_vblank);
1660 disp_ttu_regs->min_ttu_vblank = min_ttu_vblank * refclk_freq_in_mhz;
1661 ASSERT(disp_ttu_regs->min_ttu_vblank < dml_pow(2, 24));
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