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    Searched defs:mmCGTS_CU0_SP0_CTRL_REG (Results 1 - 7 of 7) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_7_0_d.h 1487 #define mmCGTS_CU0_SP0_CTRL_REG 0xf008
gfx_7_2_d.h 1508 #define mmCGTS_CU0_SP0_CTRL_REG 0xf008
gfx_8_0_d.h 1701 #define mmCGTS_CU0_SP0_CTRL_REG 0xf008
gfx_8_1_d.h 1669 #define mmCGTS_CU0_SP0_CTRL_REG 0xf008
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 6310 #define mmCGTS_CU0_SP0_CTRL_REG 0x5008
gc_9_1_offset.h 6532 #define mmCGTS_CU0_SP0_CTRL_REG 0x5008
gc_9_2_1_offset.h 6544 #define mmCGTS_CU0_SP0_CTRL_REG 0x5008

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