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    Searched defs:mmCGTS_CU3_SP0_CTRL_REG (Results 1 - 7 of 7) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_7_0_d.h 1502 #define mmCGTS_CU3_SP0_CTRL_REG 0xf017
gfx_7_2_d.h 1523 #define mmCGTS_CU3_SP0_CTRL_REG 0xf017
gfx_8_0_d.h 1716 #define mmCGTS_CU3_SP0_CTRL_REG 0xf017
gfx_8_1_d.h 1684 #define mmCGTS_CU3_SP0_CTRL_REG 0xf017
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 6340 #define mmCGTS_CU3_SP0_CTRL_REG 0x5017
gc_9_1_offset.h 6562 #define mmCGTS_CU3_SP0_CTRL_REG 0x5017
gc_9_2_1_offset.h 6574 #define mmCGTS_CU3_SP0_CTRL_REG 0x5017

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