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    Searched defs:mmCGTS_CU3_SP1_CTRL_REG (Results 1 - 7 of 7) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_7_0_d.h 1505 #define mmCGTS_CU3_SP1_CTRL_REG 0xf01a
gfx_7_2_d.h 1526 #define mmCGTS_CU3_SP1_CTRL_REG 0xf01a
gfx_8_0_d.h 1719 #define mmCGTS_CU3_SP1_CTRL_REG 0xf01a
gfx_8_1_d.h 1687 #define mmCGTS_CU3_SP1_CTRL_REG 0xf01a
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 6346 #define mmCGTS_CU3_SP1_CTRL_REG 0x501a
gc_9_1_offset.h 6568 #define mmCGTS_CU3_SP1_CTRL_REG 0x501a
gc_9_2_1_offset.h 6580 #define mmCGTS_CU3_SP1_CTRL_REG 0x501a

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