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Searched defs:mmUVD_MPC_SET_MUXA0 (Results 1 - 8 of 8) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_4_0_d.h	`58 #define mmUVD_MPC_SET_MUXA0 0x3D79`
uvd_4_2_d.h	`56 #define mmUVD_MPC_SET_MUXA0 0x3d79`
uvd_5_0_d.h	`62 #define mmUVD_MPC_SET_MUXA0 0x3d79`
uvd_6_0_d.h	`78 #define mmUVD_MPC_SET_MUXA0 0x3d79`
uvd_7_0_offset.h	`166 #define mmUVD_MPC_SET_MUXA0 0x0579`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_offset.h	`348 #define mmUVD_MPC_SET_MUXA0 0x0579`
vcn_2_0_0_offset.h	`598 #define mmUVD_MPC_SET_MUXA0 0x0239`
vcn_2_5_offset.h	`763 #define mmUVD_MPC_SET_MUXA0 0x02ce`

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