HomeSort by: relevance | last modified time | path
    Searched defs:mmUVD_MPC_SET_MUXA1 (Results 1 - 8 of 8) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_4_0_d.h 59 #define mmUVD_MPC_SET_MUXA1 0x3D7A
uvd_4_2_d.h 57 #define mmUVD_MPC_SET_MUXA1 0x3d7a
uvd_5_0_d.h 63 #define mmUVD_MPC_SET_MUXA1 0x3d7a
uvd_6_0_d.h 79 #define mmUVD_MPC_SET_MUXA1 0x3d7a
uvd_7_0_offset.h 168 #define mmUVD_MPC_SET_MUXA1 0x057a
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_offset.h 350 #define mmUVD_MPC_SET_MUXA1 0x057a
vcn_2_0_0_offset.h 600 #define mmUVD_MPC_SET_MUXA1 0x023a
vcn_2_5_offset.h 765 #define mmUVD_MPC_SET_MUXA1 0x02cf

Completed in 19 milliseconds