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      1 /*	$NetBSD: nouveau_nvkm_subdev_clk_nv04.c,v 1.3 2021/12/18 23:45:39 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright 2012 Red Hat Inc.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the "Software"),
      8  * to deal in the Software without restriction, including without limitation
      9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  * and/or sell copies of the Software, and to permit persons to whom the
     11  * Software is furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice shall be included in
     14  * all copies or substantial portions of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22  * OTHER DEALINGS IN THE SOFTWARE.
     23  *
     24  * Authors: Ben Skeggs
     25  */
     26 #include <sys/cdefs.h>
     27 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_subdev_clk_nv04.c,v 1.3 2021/12/18 23:45:39 riastradh Exp $");
     28 
     29 #include "priv.h"
     30 #include "pll.h"
     31 
     32 #include <subdev/bios.h>
     33 #include <subdev/bios/pll.h>
     34 #include <subdev/devinit/nv04.h>
     35 
     36 int
     37 nv04_clk_pll_calc(struct nvkm_clk *clock, struct nvbios_pll *info,
     38 		  int clk, struct nvkm_pll_vals *pv)
     39 {
     40 	int N1, M1, N2, M2, P;
     41 	int ret = nv04_pll_calc(&clock->subdev, info, clk, &N1, &M1, &N2, &M2, &P);
     42 	if (ret) {
     43 		pv->refclk = info->refclk;
     44 		pv->N1 = N1;
     45 		pv->M1 = M1;
     46 		pv->N2 = N2;
     47 		pv->M2 = M2;
     48 		pv->log2P = P;
     49 	}
     50 	return ret;
     51 }
     52 
     53 int
     54 nv04_clk_pll_prog(struct nvkm_clk *clk, u32 reg1, struct nvkm_pll_vals *pv)
     55 {
     56 	struct nvkm_device *device = clk->subdev.device;
     57 	struct nvkm_devinit *devinit = device->devinit;
     58 	int cv = device->bios->version.chip;
     59 
     60 	if (cv == 0x30 || cv == 0x31 || cv == 0x35 || cv == 0x36 ||
     61 	    cv >= 0x40) {
     62 		if (reg1 > 0x405c)
     63 			setPLL_double_highregs(devinit, reg1, pv);
     64 		else
     65 			setPLL_double_lowregs(devinit, reg1, pv);
     66 	} else
     67 		setPLL_single(devinit, reg1, pv);
     68 
     69 	return 0;
     70 }
     71 
     72 static const struct nvkm_clk_func
     73 nv04_clk = {
     74 	.domains = {
     75 		{ nv_clk_src_max }
     76 	}
     77 };
     78 
     79 int
     80 nv04_clk_new(struct nvkm_device *device, int index, struct nvkm_clk **pclk)
     81 {
     82 	int ret = nvkm_clk_new_(&nv04_clk, device, index, false, pclk);
     83 	if (ret == 0) {
     84 		(*pclk)->pll_calc = nv04_clk_pll_calc;
     85 		(*pclk)->pll_prog = nv04_clk_pll_prog;
     86 	}
     87 	return ret;
     88 }
     89