Home | History | Annotate | Line # | Download | only in disp 
      1 /*	$NetBSD: nouveau_nvkm_engine_disp_dmacnv50.c,v 1.3 2021/12/18 23:45:35 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright 2012 Red Hat Inc.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the "Software"),
      8  * to deal in the Software without restriction, including without limitation
      9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  * and/or sell copies of the Software, and to permit persons to whom the
     11  * Software is furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice shall be included in
     14  * all copies or substantial portions of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22  * OTHER DEALINGS IN THE SOFTWARE.
     23  *
     24  * Authors: Ben Skeggs
     25  */
     26 #include <sys/cdefs.h>
     27 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_disp_dmacnv50.c,v 1.3 2021/12/18 23:45:35 riastradh Exp $");
     28 
     29 #include "channv50.h"
     30 
     31 #include <core/client.h>
     32 #include <core/ramht.h>
     33 #include <subdev/fb.h>
     34 #include <subdev/mmu.h>
     35 #include <subdev/timer.h>
     36 #include <engine/dma.h>
     37 
     38 int
     39 nv50_disp_dmac_new_(const struct nv50_disp_chan_func *func,
     40 		    const struct nv50_disp_chan_mthd *mthd,
     41 		    struct nv50_disp *disp, int chid, int head, u64 push,
     42 		    const struct nvkm_oclass *oclass,
     43 		    struct nvkm_object **pobject)
     44 {
     45 	struct nvkm_client *client = oclass->client;
     46 	struct nv50_disp_chan *chan;
     47 	int ret;
     48 
     49 	ret = nv50_disp_chan_new_(func, mthd, disp, chid, chid, head, oclass,
     50 				  pobject);
     51 	chan = nv50_disp_chan(*pobject);
     52 	if (ret)
     53 		return ret;
     54 
     55 	chan->memory = nvkm_umem_search(client, push);
     56 	if (IS_ERR(chan->memory))
     57 		return PTR_ERR(chan->memory);
     58 
     59 	if (nvkm_memory_size(chan->memory) < 0x1000)
     60 		return -EINVAL;
     61 
     62 	switch (nvkm_memory_target(chan->memory)) {
     63 	case NVKM_MEM_TARGET_VRAM: chan->push = 0x00000001; break;
     64 	case NVKM_MEM_TARGET_NCOH: chan->push = 0x00000002; break;
     65 	case NVKM_MEM_TARGET_HOST: chan->push = 0x00000003; break;
     66 	default:
     67 		return -EINVAL;
     68 	}
     69 
     70 	chan->push |= nvkm_memory_addr(chan->memory) >> 8;
     71 	return 0;
     72 }
     73 
     74 int
     75 nv50_disp_dmac_bind(struct nv50_disp_chan *chan,
     76 		    struct nvkm_object *object, u32 handle)
     77 {
     78 	return nvkm_ramht_insert(chan->disp->ramht, object,
     79 				 chan->chid.user, -10, handle,
     80 				 chan->chid.user << 28 |
     81 				 chan->chid.user);
     82 }
     83 
     84 static void
     85 nv50_disp_dmac_fini(struct nv50_disp_chan *chan)
     86 {
     87 	struct nvkm_subdev *subdev = &chan->disp->base.engine.subdev;
     88 	struct nvkm_device *device = subdev->device;
     89 	int ctrl = chan->chid.ctrl;
     90 	int user = chan->chid.user;
     91 
     92 	/* deactivate channel */
     93 	nvkm_mask(device, 0x610200 + (ctrl * 0x0010), 0x00001010, 0x00001000);
     94 	nvkm_mask(device, 0x610200 + (ctrl * 0x0010), 0x00000003, 0x00000000);
     95 	if (nvkm_msec(device, 2000,
     96 		if (!(nvkm_rd32(device, 0x610200 + (ctrl * 0x10)) & 0x001e0000))
     97 			break;
     98 	) < 0) {
     99 		nvkm_error(subdev, "ch %d fini timeout, %08x\n", user,
    100 			   nvkm_rd32(device, 0x610200 + (ctrl * 0x10)));
    101 	}
    102 }
    103 
    104 static int
    105 nv50_disp_dmac_init(struct nv50_disp_chan *chan)
    106 {
    107 	struct nvkm_subdev *subdev = &chan->disp->base.engine.subdev;
    108 	struct nvkm_device *device = subdev->device;
    109 	int ctrl = chan->chid.ctrl;
    110 	int user = chan->chid.user;
    111 
    112 	/* initialise channel for dma command submission */
    113 	nvkm_wr32(device, 0x610204 + (ctrl * 0x0010), chan->push);
    114 	nvkm_wr32(device, 0x610208 + (ctrl * 0x0010), 0x00010000);
    115 	nvkm_wr32(device, 0x61020c + (ctrl * 0x0010), ctrl);
    116 	nvkm_mask(device, 0x610200 + (ctrl * 0x0010), 0x00000010, 0x00000010);
    117 	nvkm_wr32(device, 0x640000 + (ctrl * 0x1000), 0x00000000);
    118 	nvkm_wr32(device, 0x610200 + (ctrl * 0x0010), 0x00000013);
    119 
    120 	/* wait for it to go inactive */
    121 	if (nvkm_msec(device, 2000,
    122 		if (!(nvkm_rd32(device, 0x610200 + (ctrl * 0x10)) & 0x80000000))
    123 			break;
    124 	) < 0) {
    125 		nvkm_error(subdev, "ch %d init timeout, %08x\n", user,
    126 			   nvkm_rd32(device, 0x610200 + (ctrl * 0x10)));
    127 		return -EBUSY;
    128 	}
    129 
    130 	return 0;
    131 }
    132 
    133 const struct nv50_disp_chan_func
    134 nv50_disp_dmac_func = {
    135 	.init = nv50_disp_dmac_init,
    136 	.fini = nv50_disp_dmac_fini,
    137 	.intr = nv50_disp_chan_intr,
    138 	.user = nv50_disp_chan_user,
    139 	.bind = nv50_disp_dmac_bind,
    140 };
    141