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      1 /*	$NetBSD: nouveau_nvkm_engine_disp_sornv50.c,v 1.3 2021/12/18 23:45:35 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright 2012 Red Hat Inc.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the "Software"),
      8  * to deal in the Software without restriction, including without limitation
      9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  * and/or sell copies of the Software, and to permit persons to whom the
     11  * Software is furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice shall be included in
     14  * all copies or substantial portions of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22  * OTHER DEALINGS IN THE SOFTWARE.
     23  *
     24  * Authors: Ben Skeggs
     25  */
     26 #include <sys/cdefs.h>
     27 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_disp_sornv50.c,v 1.3 2021/12/18 23:45:35 riastradh Exp $");
     28 
     29 #include "ior.h"
     30 
     31 #include <subdev/timer.h>
     32 
     33 void
     34 nv50_sor_clock(struct nvkm_ior *sor)
     35 {
     36 	struct nvkm_device *device = sor->disp->engine.subdev.device;
     37 	const int  div = sor->asy.link == 3;
     38 	const u32 soff = nv50_ior_base(sor);
     39 	nvkm_mask(device, 0x614300 + soff, 0x00000707, (div << 8) | div);
     40 }
     41 
     42 static void
     43 nv50_sor_power_wait(struct nvkm_device *device, u32 soff)
     44 {
     45 	nvkm_msec(device, 2000,
     46 		if (!(nvkm_rd32(device, 0x61c004 + soff) & 0x80000000))
     47 			break;
     48 	);
     49 }
     50 
     51 void
     52 nv50_sor_power(struct nvkm_ior *sor, bool normal, bool pu,
     53 	       bool data, bool vsync, bool hsync)
     54 {
     55 	struct nvkm_device *device = sor->disp->engine.subdev.device;
     56 	const u32  soff = nv50_ior_base(sor);
     57 	const u32 shift = normal ? 0 : 16;
     58 	const u32 state = 0x80000000 | (0x00000001 * !!pu) << shift;
     59 	const u32 field = 0x80000000 | (0x00000001 << shift);
     60 
     61 	nv50_sor_power_wait(device, soff);
     62 	nvkm_mask(device, 0x61c004 + soff, field, state);
     63 	nv50_sor_power_wait(device, soff);
     64 
     65 	nvkm_msec(device, 2000,
     66 		if (!(nvkm_rd32(device, 0x61c030 + soff) & 0x10000000))
     67 			break;
     68 	);
     69 }
     70 
     71 void
     72 nv50_sor_state(struct nvkm_ior *sor, struct nvkm_ior_state *state)
     73 {
     74 	struct nvkm_device *device = sor->disp->engine.subdev.device;
     75 	const u32 coff = sor->id * 8 + (state == &sor->arm) * 4;
     76 	u32 ctrl = nvkm_rd32(device, 0x610b70 + coff);
     77 
     78 	state->proto_evo = (ctrl & 0x00000f00) >> 8;
     79 	switch (state->proto_evo) {
     80 	case 0: state->proto = LVDS; state->link = 1; break;
     81 	case 1: state->proto = TMDS; state->link = 1; break;
     82 	case 2: state->proto = TMDS; state->link = 2; break;
     83 	case 5: state->proto = TMDS; state->link = 3; break;
     84 	default:
     85 		state->proto = UNKNOWN;
     86 		break;
     87 	}
     88 
     89 	state->head = ctrl & 0x00000003;
     90 }
     91 
     92 static const struct nvkm_ior_func
     93 nv50_sor = {
     94 	.state = nv50_sor_state,
     95 	.power = nv50_sor_power,
     96 	.clock = nv50_sor_clock,
     97 };
     98 
     99 int
    100 nv50_sor_new(struct nvkm_disp *disp, int id)
    101 {
    102 	return nvkm_ior_new_(&nv50_sor, disp, SOR, id);
    103 }
    104 
    105 int
    106 nv50_sor_cnt(struct nvkm_disp *disp, unsigned long *pmask)
    107 {
    108 	struct nvkm_device *device = disp->engine.subdev.device;
    109 	*pmask = (nvkm_rd32(device, 0x610184) & 0x03000000) >> 24;
    110 	return 2;
    111 }
    112