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      1 /*	$NetBSD: nouveau_nvkm_subdev_bios_iccsense.c,v 1.2 2021/12/18 23:45:38 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright 2015 Martin Peres
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the "Software"),
      8  * to deal in the Software without restriction, including without limitation
      9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  * and/or sell copies of the Software, and to permit persons to whom the
     11  * Software is furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice shall be included in
     14  * all copies or substantial portions of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22  * OTHER DEALINGS IN THE SOFTWARE.
     23  *
     24  * Authors: Martin Peres
     25  */
     26 #include <sys/cdefs.h>
     27 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_subdev_bios_iccsense.c,v 1.2 2021/12/18 23:45:38 riastradh Exp $");
     28 
     29 #include <subdev/bios.h>
     30 #include <subdev/bios/bit.h>
     31 #include <subdev/bios/extdev.h>
     32 #include <subdev/bios/iccsense.h>
     33 
     34 static u32
     35 nvbios_iccsense_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt,
     36 		      u8 *len)
     37 {
     38 	struct bit_entry bit_P;
     39 	u32 iccsense;
     40 
     41 	if (bit_entry(bios, 'P', &bit_P) || bit_P.version != 2 ||
     42 	    bit_P.length < 0x2c)
     43 		return 0;
     44 
     45 	iccsense = nvbios_rd32(bios, bit_P.offset + 0x28);
     46 	if (!iccsense)
     47 		return 0;
     48 
     49 	*ver = nvbios_rd08(bios, iccsense + 0);
     50 	switch (*ver) {
     51 	case 0x10:
     52 	case 0x20:
     53 		*hdr = nvbios_rd08(bios, iccsense + 1);
     54 		*len = nvbios_rd08(bios, iccsense + 2);
     55 		*cnt = nvbios_rd08(bios, iccsense + 3);
     56 		return iccsense;
     57 	default:
     58 		break;
     59 	}
     60 
     61 	return 0;
     62 }
     63 
     64 int
     65 nvbios_iccsense_parse(struct nvkm_bios *bios, struct nvbios_iccsense *iccsense)
     66 {
     67 	struct nvkm_subdev *subdev = &bios->subdev;
     68 	u8 ver, hdr, cnt, len, i;
     69 	u32 table, entry;
     70 
     71 	table = nvbios_iccsense_table(bios, &ver, &hdr, &cnt, &len);
     72 	if (!table || !cnt)
     73 		return -EINVAL;
     74 
     75 	if (ver != 0x10 && ver != 0x20) {
     76 		nvkm_error(subdev, "ICCSENSE version 0x%02x unknown\n", ver);
     77 		return -EINVAL;
     78 	}
     79 
     80 	iccsense->nr_entry = cnt;
     81 	iccsense->rail = kmalloc_array(cnt, sizeof(struct pwr_rail_t),
     82 				       GFP_KERNEL);
     83 	if (!iccsense->rail)
     84 		return -ENOMEM;
     85 
     86 	for (i = 0; i < cnt; ++i) {
     87 		struct nvbios_extdev_func extdev;
     88 		struct pwr_rail_t *rail = &iccsense->rail[i];
     89 		u8 res_start = 0;
     90 		int r;
     91 
     92 		entry = table + hdr + i * len;
     93 
     94 		switch(ver) {
     95 		case 0x10:
     96 			if ((nvbios_rd08(bios, entry + 0x1) & 0xf8) == 0xf8)
     97 				rail->mode = 1;
     98 			else
     99 				rail->mode = 0;
    100 			rail->extdev_id = nvbios_rd08(bios, entry + 0x2);
    101 			res_start = 0x3;
    102 			break;
    103 		case 0x20:
    104 			rail->mode = nvbios_rd08(bios, entry);
    105 			rail->extdev_id = nvbios_rd08(bios, entry + 0x1);
    106 			res_start = 0x5;
    107 			break;
    108 		}
    109 
    110 		if (nvbios_extdev_parse(bios, rail->extdev_id, &extdev))
    111 			continue;
    112 
    113 		switch (extdev.type) {
    114 		case NVBIOS_EXTDEV_INA209:
    115 		case NVBIOS_EXTDEV_INA219:
    116 			rail->resistor_count = 1;
    117 			break;
    118 		case NVBIOS_EXTDEV_INA3221:
    119 			rail->resistor_count = 3;
    120 			break;
    121 		default:
    122 			rail->resistor_count = 0;
    123 			break;
    124 		}
    125 
    126 		for (r = 0; r < rail->resistor_count; ++r) {
    127 			rail->resistors[r].mohm = nvbios_rd08(bios, entry + res_start + r * 2);
    128 			rail->resistors[r].enabled = !(nvbios_rd08(bios, entry + res_start + r * 2 + 1) & 0x40);
    129 		}
    130 		rail->config = nvbios_rd16(bios, entry + res_start + rail->resistor_count * 2);
    131 	}
    132 
    133 	return 0;
    134 }
    135