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      1 /*	$NetBSD: nouveau_nvkm_subdev_fb_gddr3.c,v 1.3 2021/12/18 23:45:39 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright 2013 Red Hat Inc.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the "Software"),
      8  * to deal in the Software without restriction, including without limitation
      9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  * and/or sell copies of the Software, and to permit persons to whom the
     11  * Software is furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice shall be included in
     14  * all copies or substantial portions of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22  * OTHER DEALINGS IN THE SOFTWARE.
     23  *
     24  * Authors: Ben Skeggs <bskeggs (at) redhat.com>
     25  * 	    Roy Spliet <rspliet (at) eclipso.eu>
     26  */
     27 #include <sys/cdefs.h>
     28 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_subdev_fb_gddr3.c,v 1.3 2021/12/18 23:45:39 riastradh Exp $");
     29 
     30 #include "ram.h"
     31 
     32 struct ramxlat {
     33 	int id;
     34 	u8 enc;
     35 };
     36 
     37 static inline int
     38 ramxlat(const struct ramxlat *xlat, int id)
     39 {
     40 	while (xlat->id >= 0) {
     41 		if (xlat->id == id)
     42 			return xlat->enc;
     43 		xlat++;
     44 	}
     45 	return -EINVAL;
     46 }
     47 
     48 static const struct ramxlat
     49 ramgddr3_cl_lo[] = {
     50 	{ 5, 5 }, { 7, 7 }, { 8, 0 }, { 9, 1 }, { 10, 2 }, { 11, 3 }, { 12, 8 },
     51 	/* the below are mentioned in some, but not all, gddr3 docs */
     52 	{ 13, 9 }, { 14, 6 },
     53 	/* XXX: Per Samsung docs, are these used? They overlap with Qimonda */
     54 	/* { 4, 4 }, { 5, 5 }, { 6, 6 }, { 12, 8 }, { 13, 9 }, { 14, 10 },
     55 	 * { 15, 11 }, */
     56 	{ -1 }
     57 };
     58 
     59 static const struct ramxlat
     60 ramgddr3_cl_hi[] = {
     61 	{ 10, 2 }, { 11, 3 }, { 12, 4 }, { 13, 5 }, { 14, 6 }, { 15, 7 },
     62 	{ 16, 0 }, { 17, 1 },
     63 	{ -1 }
     64 };
     65 
     66 static const struct ramxlat
     67 ramgddr3_wr_lo[] = {
     68 	{ 5, 2 }, { 7, 4 }, { 8, 5 }, { 9, 6 }, { 10, 7 },
     69 	{ 11, 0 }, { 13 , 1 },
     70 	/* the below are mentioned in some, but not all, gddr3 docs */
     71 	{ 4, 0 }, { 6, 3 }, { 12, 1 },
     72 	{ -1 }
     73 };
     74 
     75 int
     76 nvkm_gddr3_calc(struct nvkm_ram *ram)
     77 {
     78 	int CL, WR, CWL, DLL = 0, ODT = 0, RON, hi;
     79 
     80 	switch (ram->next->bios.timing_ver) {
     81 	case 0x10:
     82 		CWL = ram->next->bios.timing_10_CWL;
     83 		CL  = ram->next->bios.timing_10_CL;
     84 		WR  = ram->next->bios.timing_10_WR;
     85 		DLL = !ram->next->bios.ramcfg_DLLoff;
     86 		ODT = ram->next->bios.timing_10_ODT;
     87 		RON = ram->next->bios.ramcfg_RON;
     88 		break;
     89 	case 0x20:
     90 		CWL = (ram->next->bios.timing[1] & 0x00000f80) >> 7;
     91 		CL  = (ram->next->bios.timing[1] & 0x0000001f) >> 0;
     92 		WR  = (ram->next->bios.timing[2] & 0x007f0000) >> 16;
     93 		/* XXX: Get these values from the VBIOS instead */
     94 		DLL = !(ram->mr[1] & 0x1);
     95 		RON = !((ram->mr[1] & 0x300) >> 8);
     96 		break;
     97 	default:
     98 		return -ENOSYS;
     99 	}
    100 
    101 	if (ram->next->bios.timing_ver == 0x20 ||
    102 	    ram->next->bios.ramcfg_timing == 0xff) {
    103 		ODT =  (ram->mr[1] & 0xc) >> 2;
    104 	}
    105 
    106 	hi = ram->mr[2] & 0x1;
    107 	CL  = ramxlat(hi ? ramgddr3_cl_hi : ramgddr3_cl_lo, CL);
    108 	WR  = ramxlat(ramgddr3_wr_lo, WR);
    109 	if (CL < 0 || CWL < 1 || CWL > 7 || WR < 0)
    110 		return -EINVAL;
    111 
    112 	ram->mr[0] &= ~0xf74;
    113 	ram->mr[0] |= (CWL & 0x07) << 9;
    114 	ram->mr[0] |= (CL & 0x07) << 4;
    115 	ram->mr[0] |= (CL & 0x08) >> 1;
    116 
    117 	ram->mr[1] &= ~0x3fc;
    118 	ram->mr[1] |= (ODT & 0x03) << 2;
    119 	ram->mr[1] |= (RON & 0x03) << 8;
    120 	ram->mr[1] |= (WR  & 0x03) << 4;
    121 	ram->mr[1] |= (WR  & 0x04) << 5;
    122 	ram->mr[1] |= !DLL << 6;
    123 	return 0;
    124 }
    125