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      1 /*	$NetBSD: nouveau_nvkm_subdev_fb_sddr3.c,v 1.4 2021/12/18 23:45:39 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright 2013 Red Hat Inc.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the "Software"),
      8  * to deal in the Software without restriction, including without limitation
      9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  * and/or sell copies of the Software, and to permit persons to whom the
     11  * Software is furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice shall be included in
     14  * all copies or substantial portions of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22  * OTHER DEALINGS IN THE SOFTWARE.
     23  *
     24  * Authors: Ben Skeggs <bskeggs (at) redhat.com>
     25  * 	    Roy Spliet <rspliet (at) eclipso.eu>
     26  */
     27 #include <sys/cdefs.h>
     28 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_subdev_fb_sddr3.c,v 1.4 2021/12/18 23:45:39 riastradh Exp $");
     29 
     30 #include "ram.h"
     31 #include "priv.h"
     32 #include "ram.h"
     33 
     34 struct ramxlat {
     35 	int id;
     36 	u8 enc;
     37 };
     38 
     39 static inline int
     40 ramxlat(const struct ramxlat *xlat, int id)
     41 {
     42 	while (xlat->id >= 0) {
     43 		if (xlat->id == id)
     44 			return xlat->enc;
     45 		xlat++;
     46 	}
     47 	return -EINVAL;
     48 }
     49 
     50 static const struct ramxlat
     51 ramddr3_cl[] = {
     52 	{ 5, 2 }, { 6, 4 }, { 7, 6 }, { 8, 8 }, { 9, 10 }, { 10, 12 },
     53 	{ 11, 14 },
     54 	/* the below are mentioned in some, but not all, ddr3 docs */
     55 	{ 12, 1 }, { 13, 3 }, { 14, 5 },
     56 	{ -1 }
     57 };
     58 
     59 static const struct ramxlat
     60 ramddr3_wr[] = {
     61 	{ 5, 1 }, { 6, 2 }, { 7, 3 }, { 8, 4 }, { 10, 5 }, { 12, 6 },
     62 	/* the below are mentioned in some, but not all, ddr3 docs */
     63 	{ 14, 7 }, { 15, 7 }, { 16, 0 },
     64 	{ -1 }
     65 };
     66 
     67 static const struct ramxlat
     68 ramddr3_cwl[] = {
     69 	{ 5, 0 }, { 6, 1 }, { 7, 2 }, { 8, 3 },
     70 	/* the below are mentioned in some, but not all, ddr3 docs */
     71 	{ 9, 4 }, { 10, 5 },
     72 	{ -1 }
     73 };
     74 
     75 int
     76 nvkm_sddr3_calc(struct nvkm_ram *ram)
     77 {
     78 	int CWL, CL, WR, DLL = 0, ODT = 0;
     79 
     80 	DLL = !ram->next->bios.ramcfg_DLLoff;
     81 
     82 	switch (ram->next->bios.timing_ver) {
     83 	case 0x10:
     84 		if (ram->next->bios.timing_hdr < 0x17) {
     85 			/* XXX: NV50: Get CWL from the timing register */
     86 			return -ENOSYS;
     87 		}
     88 		CWL = ram->next->bios.timing_10_CWL;
     89 		CL  = ram->next->bios.timing_10_CL;
     90 		WR  = ram->next->bios.timing_10_WR;
     91 		ODT = ram->next->bios.timing_10_ODT;
     92 		break;
     93 	case 0x20:
     94 		CWL = (ram->next->bios.timing[1] & 0x00000f80) >> 7;
     95 		CL  = (ram->next->bios.timing[1] & 0x0000001f) >> 0;
     96 		WR  = (ram->next->bios.timing[2] & 0x007f0000) >> 16;
     97 		/* XXX: Get these values from the VBIOS instead */
     98 		ODT =   (ram->mr[1] & 0x004) >> 2 |
     99 			(ram->mr[1] & 0x040) >> 5 |
    100 		        (ram->mr[1] & 0x200) >> 7;
    101 		break;
    102 	default:
    103 		return -ENOSYS;
    104 	}
    105 
    106 	CWL = ramxlat(ramddr3_cwl, CWL);
    107 	CL  = ramxlat(ramddr3_cl, CL);
    108 	WR  = ramxlat(ramddr3_wr, WR);
    109 	if (CL < 0 || CWL < 0 || WR < 0)
    110 		return -EINVAL;
    111 
    112 	ram->mr[0] &= ~0xf74;
    113 	ram->mr[0] |= (WR & 0x07) << 9;
    114 	ram->mr[0] |= (CL & 0x0e) << 3;
    115 	ram->mr[0] |= (CL & 0x01) << 2;
    116 
    117 	ram->mr[1] &= ~0x245;
    118 	ram->mr[1] |= (ODT & 0x1) << 2;
    119 	ram->mr[1] |= (ODT & 0x2) << 5;
    120 	ram->mr[1] |= (ODT & 0x4) << 7;
    121 	ram->mr[1] |= !DLL;
    122 
    123 	ram->mr[2] &= ~0x038;
    124 	ram->mr[2] |= (CWL & 0x07) << 3;
    125 	return 0;
    126 }
    127