1 /* $NetBSD: machdep.c,v 1.25 2024/03/05 14:15:30 thorpej Exp $ */ 2 3 /* 4 * Copyright 2001, 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe and Simon Burge for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * Copyright (c) 1992, 1993 40 * The Regents of the University of California. All rights reserved. 41 * 42 * This code is derived from software contributed to Berkeley by 43 * the Systems Programming Group of the University of Utah Computer 44 * Science Department, The Mach Operating System project at 45 * Carnegie-Mellon University and Ralph Campbell. 46 * 47 * Redistribution and use in source and binary forms, with or without 48 * modification, are permitted provided that the following conditions 49 * are met: 50 * 1. Redistributions of source code must retain the above copyright 51 * notice, this list of conditions and the following disclaimer. 52 * 2. Redistributions in binary form must reproduce the above copyright 53 * notice, this list of conditions and the following disclaimer in the 54 * documentation and/or other materials provided with the distribution. 55 * 3. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)machdep.c 8.3 (Berkeley) 1/12/94 72 * from: Utah Hdr: machdep.c 1.63 91/04/24 73 */ 74 /* 75 * Copyright (c) 1988 University of Utah. 76 * 77 * This code is derived from software contributed to Berkeley by 78 * the Systems Programming Group of the University of Utah Computer 79 * Science Department, The Mach Operating System project at 80 * Carnegie-Mellon University and Ralph Campbell. 81 * 82 * Redistribution and use in source and binary forms, with or without 83 * modification, are permitted provided that the following conditions 84 * are met: 85 * 1. Redistributions of source code must retain the above copyright 86 * notice, this list of conditions and the following disclaimer. 87 * 2. Redistributions in binary form must reproduce the above copyright 88 * notice, this list of conditions and the following disclaimer in the 89 * documentation and/or other materials provided with the distribution. 90 * 3. All advertising materials mentioning features or use of this software 91 * must display the following acknowledgement: 92 * This product includes software developed by the University of 93 * California, Berkeley and its contributors. 94 * 4. Neither the name of the University nor the names of its contributors 95 * may be used to endorse or promote products derived from this software 96 * without specific prior written permission. 97 * 98 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 99 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 100 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 101 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 102 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 103 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 104 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 105 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 106 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 107 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 108 * SUCH DAMAGE. 109 * 110 * @(#)machdep.c 8.3 (Berkeley) 1/12/94 111 * from: Utah Hdr: machdep.c 1.63 91/04/24 112 */ 113 114 #include "opt_multiprocessor.h" 115 116 #include <sys/cdefs.h> 117 __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.25 2024/03/05 14:15:30 thorpej Exp $"); 118 119 #include <sys/param.h> 120 #include <sys/systm.h> 121 #include <sys/kernel.h> 122 #include <sys/buf.h> 123 #include <sys/cpu.h> 124 #include <sys/reboot.h> 125 #include <sys/mount.h> 126 #include <sys/kcore.h> 127 #include <sys/boot_flag.h> 128 #include <sys/termios.h> 129 #include <sys/ksyms.h> 130 131 #include <uvm/uvm_extern.h> 132 133 #include <dev/cons.h> 134 135 #include "ksyms.h" 136 137 #if NKSYMS || defined(DDB) || defined(LKM) 138 #include <machine/db_machdep.h> 139 #include <ddb/db_extern.h> 140 #endif 141 142 #include <machine/psl.h> 143 #include <machine/locore.h> 144 145 #include <mips/cavium/autoconf.h> 146 #include <mips/cavium/octeonvar.h> 147 #include <mips/cavium/include/iobusvar.h> 148 #include <mips/cavium/include/bootbusvar.h> 149 150 #include <mips/cavium/dev/octeon_uartvar.h> 151 #include <mips/cavium/dev/octeon_ciureg.h> 152 #include <mips/cavium/dev/octeon_gpioreg.h> 153 154 #include <evbmips/cavium/octeon_uboot.h> 155 156 #include <dev/fdt/fdtvar.h> 157 #include <dev/fdt/fdt_private.h> 158 159 static void mach_init_vector(void); 160 static void mach_init_bus_space(void); 161 static void mach_init_console(void); 162 static void mach_init_memory(void); 163 static void parse_boot_args(void); 164 165 #include "com.h" 166 #if NCOM > 0 167 #include <dev/ic/comreg.h> 168 #include <dev/ic/comvar.h> 169 int comcnrate = 115200; /* XXX should be config option */ 170 #endif /* NCOM > 0 */ 171 172 /* Maps for VM objects. */ 173 struct vm_map *phys_map = NULL; 174 175 int netboot; 176 177 phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX]; 178 int mem_cluster_cnt; 179 extern char kernel_text[]; 180 extern char edata[]; 181 extern char end[]; 182 183 void mach_init(uint64_t, uint64_t, uint64_t, uint64_t); 184 185 struct octeon_config octeon_configuration; 186 struct octeon_btdesc octeon_btdesc; 187 struct octeon_btinfo octeon_btinfo; 188 189 #ifdef notyet 190 static char octeon_nmi_stack[PAGE_SIZE] __section(".data1") __aligned(PAGE_SIZE); 191 #endif 192 193 /* Currently the OCTEON kernels only support big endian boards */ 194 CTASSERT(_BYTE_ORDER == _BIG_ENDIAN); 195 196 /* 197 * Do all the stuff that locore normally does before calling main(). 198 */ 199 void 200 mach_init(uint64_t arg0, uint64_t arg1, uint64_t arg2, uint64_t arg3) 201 { 202 uint64_t btinfo_paddr; 203 void *fdt_data; 204 205 /* clear the BSS segment */ 206 memset(edata, 0, end - edata); 207 208 cpu_reset_address = octeon_soft_reset; 209 210 #if 1 || defined(OCTEON_EARLY_CONSOLE) /* XXX - remove "1 ||" when MP works */ 211 /* 212 * Set up very conservative timer params so we can use delay(9) 213 * early. It doesn't matter if we delay too long at this stage. 214 */ 215 octeon_cal_timer(2000 * 1000 * 1000); 216 octuart_early_cnattach(comcnrate); 217 #endif /* OCTEON_EARLY_CONSOLE */ 218 219 KASSERT(MIPS_XKPHYS_P(arg3)); 220 btinfo_paddr = mips3_ld(arg3 + OCTEON_BTINFO_PADDR_OFFSET); 221 222 /* XXX KASSERT these addresses? */ 223 memcpy(&octeon_btdesc, (void *)arg3, sizeof(octeon_btdesc)); 224 if ((octeon_btdesc.obt_desc_ver == OCTEON_SUPPORTED_DESCRIPTOR_VERSION) && 225 (octeon_btdesc.obt_desc_size == sizeof(octeon_btdesc))) { 226 btinfo_paddr = MIPS_PHYS_TO_XKPHYS(CCA_CACHEABLE, 227 octeon_btdesc.obt_boot_info_addr); 228 } else { 229 panic("unknown boot descriptor size %u", 230 octeon_btdesc.obt_desc_size); 231 } 232 memcpy(&octeon_btinfo, (void *)btinfo_paddr, sizeof(octeon_btinfo)); 233 parse_boot_args(); 234 235 octeon_cal_timer(octeon_btinfo.obt_eclock_hz); 236 237 cpu_setmodel("Cavium Octeon %s", 238 octeon_cpu_model(mips_options.mips_cpu_id)); 239 240 if (octeon_btinfo.obt_minor_version >= 3 && 241 octeon_btinfo.obt_fdt_addr != 0) { 242 fdt_data = (void *)MIPS_PHYS_TO_XKPHYS(CCA_CACHEABLE, 243 octeon_btinfo.obt_fdt_addr); 244 fdtbus_init(fdt_data); 245 } 246 247 mach_init_vector(); 248 249 uvm_md_init(); 250 251 mach_init_bus_space(); 252 253 mach_init_console(); 254 255 #ifdef DEBUG 256 /* Show a couple of boot desc/info params for positive feedback */ 257 printf(">> boot desc eclock = %d\n", octeon_btdesc.obt_eclock); 258 printf(">> boot desc core mask = %#x\n", octeon_btinfo.obt_core_mask); 259 printf(">> boot info board = %d\n", octeon_btinfo.obt_board_type); 260 #endif /* DEBUG */ 261 262 mach_init_memory(); 263 264 /* 265 * Allocate uarea page for lwp0 and set it. 266 */ 267 mips_init_lwp0_uarea(); 268 269 #ifdef notyet 270 curcpu()->ci_nmi_stack = octeon_nmi_stack + sizeof(octeon_nmi_stack) - sizeof(struct kernframe); 271 *(uint64_t *)MIPS_PHYS_TO_KSEG0(0x800) = (intptr_t)octeon_reset_vector; 272 const uint64_t wdog_reg = MIPS_PHYS_TO_XKPHYS_UNCACHED(CIU_WDOG0); 273 uint64_t wdog = mips3_ld(wdog_reg); 274 wdog &= ~(CIU_WDOGX_MODE|CIU_WDOGX_LEN); 275 wdog |= __SHIFTIN(3, CIU_WDOGX_MODE); 276 wdog |= CIU_WDOGX_LEN; // max period 277 mips64_sd_a64(wdog_reg, wdog); 278 printf("Watchdog enabled!\n"); 279 #endif /* notyet */ 280 281 #if defined(DDB) 282 if (boothowto & RB_KDB) 283 Debugger(); 284 #endif 285 } 286 287 void 288 consinit(void) 289 { 290 291 /* 292 * Everything related to console initialization is done 293 * in mach_init(). 294 */ 295 } 296 297 void 298 mach_init_vector(void) 299 { 300 301 /* Make sure exception base at 0 (MIPS_COP_0_EBASE) */ 302 __asm __volatile("mtc0 %0, $15, 1" : : "r"(0x80000000) ); 303 304 /* 305 * Set up the exception vectors and CPU-specific function 306 * vectors early on. We need the wbflush() vector set up 307 * before comcnattach() is called (or at least before the 308 * first printf() after that is called). 309 * Also clears the I+D caches. 310 */ 311 mips_vector_init(NULL, true); 312 } 313 314 void 315 mach_init_bus_space(void) 316 { 317 struct octeon_config *mcp = &octeon_configuration; 318 319 octeon_dma_init(mcp); 320 321 iobus_bootstrap(mcp); 322 bootbus_bootstrap(mcp); 323 } 324 325 void 326 mach_init_console(void) 327 { 328 #if NCOM > 0 329 struct octeon_config *mcp = &octeon_configuration; 330 int status; 331 extern int octuart_com_cnattach(bus_space_tag_t, int, int); 332 333 /* 334 * Delay to allow firmware putchars to complete. 335 * FIFO depth * character time. 336 * character time = (1000000 / (defaultrate / 10)) 337 */ 338 delay(640000000 / comcnrate); 339 340 status = octuart_com_cnattach( 341 &mcp->mc_iobus_bust, 342 0, /* XXX port 0 */ 343 comcnrate); 344 if (status != 0) 345 panic("can't initialize console!"); /* XXX print to nowhere! */ 346 #else 347 panic("octeon: not configured to use serial console"); 348 #endif /* NCOM > 0 */ 349 } 350 351 static void 352 mach_init_memory(void) 353 { 354 struct octeon_bootmem_desc *memdesc; 355 struct octeon_bootmem_block_header *block; 356 paddr_t blockaddr; 357 int i; 358 359 mem_cluster_cnt = 0; 360 361 if (octeon_btinfo.obt_phy_mem_desc_addr == 0) 362 panic("bootmem desc is missing"); 363 364 memdesc = (void *)MIPS_PHYS_TO_XKPHYS(CCA_CACHEABLE, 365 octeon_btinfo.obt_phy_mem_desc_addr); 366 printf("u-boot bootmem desc @ 0x%x version %d.%d\n", 367 octeon_btinfo.obt_phy_mem_desc_addr, 368 memdesc->bmd_major_version, memdesc->bmd_minor_version); 369 if (memdesc->bmd_major_version > 3) 370 panic("unhandled bootmem desc version %d.%d", 371 memdesc->bmd_major_version, memdesc->bmd_minor_version); 372 373 blockaddr = memdesc->bmd_head_addr; 374 if (blockaddr == 0) 375 panic("bootmem list is empty"); 376 377 for (i = 0; i < VM_PHYSSEG_MAX && blockaddr != 0; 378 i++, blockaddr = block->bbh_next_block_addr) { 379 block = (void *)MIPS_PHYS_TO_XKPHYS(CCA_CACHEABLE, blockaddr); 380 381 mem_clusters[mem_cluster_cnt].start = blockaddr; 382 mem_clusters[mem_cluster_cnt].size = block->bbh_size; 383 mem_cluster_cnt++; 384 } 385 386 physmem = btoc(octeon_btinfo.obt_dram_size * 1024 * 1024); 387 388 #ifdef MULTIPROCESSOR 389 const uint64_t fuse = octeon_xkphys_read_8(CIU_FUSE); 390 const int cores = popcount64(fuse); 391 mem_clusters[0].start += cores * PAGE_SIZE; 392 mem_clusters[0].size -= cores * PAGE_SIZE; 393 #endif 394 395 /* 396 * Load the rest of the available pages into the VM system. 397 */ 398 mips_page_physload(mips_trunc_page(kernel_text), mips_round_page(end), 399 mem_clusters, mem_cluster_cnt, NULL, 0); 400 401 /* 402 * Initialize error message buffer (at end of core). 403 */ 404 mips_init_msgbuf(); 405 406 pmap_bootstrap(); 407 } 408 409 void 410 parse_boot_args(void) 411 { 412 int i; 413 char *arg, *p; 414 415 for (i = 0; i < octeon_btdesc.obt_argc; i++) { 416 arg = (char *)MIPS_PHYS_TO_KSEG0(octeon_btdesc.obt_argv[i]); 417 if (*arg == '-') { 418 for (p = arg + 1; *p; p++) { 419 switch (*p) { 420 case '1': 421 boothowto |= RB_MD1; 422 break; 423 case 's': 424 boothowto |= RB_SINGLE; 425 break; 426 case 'd': 427 boothowto |= RB_KDB; 428 break; 429 case 'a': 430 boothowto |= RB_ASKNAME; 431 break; 432 case 'q': 433 boothowto |= AB_QUIET; 434 break; 435 case 'v': 436 boothowto |= AB_VERBOSE; 437 break; 438 case 'x': 439 boothowto |= AB_DEBUG; 440 break; 441 case 'z': 442 boothowto |= AB_SILENT; 443 break; 444 } 445 } 446 } 447 if (strncmp(arg, "root=", 5) == 0) 448 rootspec = strchr(arg, '=') + 1; 449 } 450 } 451 452 /* 453 * cpu_startup 454 * cpu_reboot 455 */ 456 457 int waittime = -1; 458 459 /* 460 * Allocate memory for variable-sized tables, 461 */ 462 void 463 cpu_startup(void) 464 { 465 466 /* 467 * Do the common startup items. 468 */ 469 cpu_startup_common(); 470 471 /* 472 * Virtual memory is bootstrapped -- notify the bus spaces 473 * that memory allocation is now safe. 474 */ 475 octeon_configuration.mc_mallocsafe = 1; 476 477 fdtbus_intr_init(); 478 } 479 480 void 481 cpu_reboot(int howto, char *bootstr) 482 { 483 484 /* Take a snapshot before clobbering any registers. */ 485 savectx(curpcb); 486 487 if (cold) { 488 howto |= RB_HALT; 489 goto haltsys; 490 } 491 492 /* If "always halt" was specified as a boot flag, obey. */ 493 if (boothowto & RB_HALT) 494 howto |= RB_HALT; 495 496 boothowto = howto; 497 if ((howto & RB_NOSYNC) == 0 && (waittime < 0)) { 498 waittime = 0; 499 vfs_shutdown(); 500 } 501 502 splhigh(); 503 504 if (howto & RB_DUMP) 505 dumpsys(); 506 507 haltsys: 508 doshutdownhooks(); 509 510 if (howto & RB_HALT) { 511 printf("\n"); 512 printf("The operating system has halted.\n"); 513 printf("Please press any key to reboot.\n\n"); 514 cnpollc(1); /* For proper keyboard command handling */ 515 cngetc(); 516 cnpollc(0); 517 } 518 519 printf("%s\n\n", ((howto & RB_HALT) != 0) ? "halted." : "rebooting..."); 520 521 /* 522 * Need a small delay here, otherwise we see the first few characters of 523 * the warning below. 524 */ 525 delay(80000); 526 527 octeon_soft_reset(); 528 529 delay(1000000); 530 531 printf("WARNING: reset failed!\nSpinning..."); 532 533 for (;;) 534 /* spin forever */ ; /* XXX */ 535 } 536
Indexes created Sun Sep 21 20:09:37 GMT 2025