| /xsrc/external/mit/MesaLib/dist/src/amd/compiler/tests/ |
| test_regalloc.cpp | 88 //! s2: %op1:s[2-3] = p_unit_test
89 Temp op1 = bld.pseudo(aco_opcode::p_unit_test, bld.def(s2)); variable
91 //! s2: %op1_2:s[0-1], s2: %op0_2:s[2-3] = p_parallelcopy %op1:s[2-3], %op0:s[0-1]
95 bld.pseudo(aco_opcode::p_unit_test, op, op1);
|
| /xsrc/external/mit/MesaLib/dist/src/intel/compiler/ |
| brw_nir_lower_conversions.c | 54 split_conversion(nir_builder *b, nir_alu_instr *alu, nir_op op1, nir_op op2)
59 nir_ssa_def *tmp = nir_build_alu(b, op1, src, NULL, NULL, NULL);
91 nir_op op1 = get_conversion_op(src_type, src_bit_size, local
97 split_conversion(b, alu, op1, op2);
117 nir_op op1 = get_conversion_op(src_type, src_bit_size, dst_type, 32, local
121 split_conversion(b, alu, op1, op2);
|
| brw_vec4_generator.cpp | 91 struct brw_reg &op1 = is_int_div ? src0 : src1; local
96 brw_MOV(p, retype(brw_message_reg(inst->base_mrf + 1), op1.type), op1);
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| /xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/ |
| brw_nir_lower_conversions.c | 54 split_conversion(nir_builder *b, nir_alu_instr *alu, nir_op op1, nir_op op2)
59 nir_ssa_def *tmp = nir_build_alu(b, op1, src, NULL, NULL, NULL);
91 nir_op op1 = get_conversion_op(src_type, src_bit_size, local
97 split_conversion(b, alu, op1, op2);
117 nir_op op1 = get_conversion_op(src_type, src_bit_size, dst_type, 32, local
121 split_conversion(b, alu, op1, op2);
|
| brw_vec4_generator.cpp | 90 struct brw_reg &op1 = is_int_div ? src0 : src1; local
95 brw_MOV(p, retype(brw_message_reg(inst->base_mrf + 1), op1.type), op1);
|
| /xsrc/external/mit/xorg-server/dist/hw/xfree86/x86emu/ |
| debug.c | 95 u8 op1; local
141 op1 = (*sys_rdb) (((u32) M.x86.R_CS << 4) + (M.x86.R_IP++));
142 (x86emu_optab[op1]) (op1);
|
| decode.c | 106 u8 op1; local
134 op1 = (*sys_rdb) (((u32) M.x86.R_CS << 4) + (M.x86.R_IP++));
135 (*x86emu_optab[op1]) (op1);
|
| /xsrc/external/mit/xorg-server.old/dist/hw/xfree86/x86emu/ |
| decode.c | 93 u8 op1; local
121 op1 = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++));
122 (*x86emu_optab[op1])(op1);
|
| debug.c | 91 u8 op1; local
136 op1 = (*sys_rdb)(((u32)M.x86.R_CS<<4) + (M.x86.R_IP++));
137 (x86emu_optab[op1])(op1);
|
| /xsrc/external/mit/MesaLib/dist/src/compiler/glsl/ |
| loop_analysis.cpp | 791 ir_variable *const op1 = rhs->operands[1]->variable_referenced(); local
793 if (((op0 != var) && (op1 != var))
794 || ((op1 == var) && (rhs->operation == ir_binop_sub)))
|
| lower_instructions.cpp | 49 * Breaks an ir_binop_sub expression down to add(op0, neg(op1))
54 * want to recognize add(op0, neg(op1)) or the other way around to
59 * Breaks an ir_binop_div expression down to op0 * (rcp(op1)).
86 * Breaks an ir_binop_mod expression down to (op0 - op1 * floor(op0 / op1))
90 * opportunity to do things like constant fold the (1.0 / op1) easily.
92 * Note: before we used to implement this as op1 * fract(op / op1) but this
215 /* New expression for the 1.0 / op1 */
221 /* op0 / op1 -> op0 * (1.0 / op1) *
238 ir_rvalue *op0, *op1; local
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/mesa/main/ |
| atifragshader.c | 404 GLuint op1 = curProg->Instructions[j][i].Opcode[1]; local
406 const char *op1_enum = op1 > 5 ? _mesa_enum_to_string(op1) : "0";
410 op1, op1_enum, count1);
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| /xsrc/external/mit/MesaLib.old/dist/src/compiler/glsl/ |
| loop_analysis.cpp | 744 ir_variable *const op1 = rhs->operands[1]->variable_referenced(); local
746 if (((op0 != var) && (op1 != var))
747 || ((op1 == var) && (rhs->operation == ir_binop_sub)))
|
| lower_instructions.cpp | 49 * Breaks an ir_binop_sub expression down to add(op0, neg(op1))
54 * want to recognize add(op0, neg(op1)) or the other way around to
59 * Breaks an ir_binop_div expression down to op0 * (rcp(op1)).
85 * Breaks an ir_binop_mod expression down to (op0 - op1 * floor(op0 / op1))
89 * opportunity to do things like constant fold the (1.0 / op1) easily.
91 * Note: before we used to implement this as op1 * fract(op / op1) but this
208 /* New expression for the 1.0 / op1 */
214 /* op0 / op1 -> op0 * (1.0 / op1) *
231 ir_rvalue *op0, *op1; local
[all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/mesa/main/ |
| atifragshader.c | 400 GLuint op1 = curProg->Instructions[j][i].Opcode[1]; local
402 const char *op1_enum = op1 > 5 ? _mesa_enum_to_string(op1) : "0";
406 op1, op1_enum, count1);
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/ |
| nv50_ir_emit_gk110.cpp | 1008 uint32_t op2, op1; local
1014 op1 = 0xc10;
1018 op1 = 0xc30;
1022 op1 = 0xc28;
1027 op1 = 0;
1030 emitForm_21(i, op2, op1);
1111 uint16_t op1, op2; local
1115 case TYPE_F32: op2 = 0x1d8; op1 = 0xb58; break;
1116 case TYPE_F64: op2 = 0x1c0; op1 = 0xb40; break;
1119 op1 = 0xb30
[all...] |
| nv50_ir_peephole.cpp | 2628 Value *op1[2]; local
2630 bld.mkSplit(op1, 4, i->getSrc(0));
2632 op1[0] = i->getSrc(0);
2633 op1[1] = zero;
2655 bld.mkOp3(OP_MAD, hTy, tmpRes1Hi, op1[1], op2[0], op3[1]);
2657 bld.mkOp2(OP_MUL, hTy, tmpRes1Hi, op1[1], op2[0]);
2659 Value *tmpRes2Hi = bld.mkOp3v(OP_MAD, hTy, bld.getSSA(), op1[0], op2[1], tmpRes1Hi);
2667 bld.mkOp3(OP_MAD, hTy, def[0], op1[0], op2[0], op3[0])->setFlagsDef(1, carry);
2669 bld.mkOp2(OP_MUL, hTy, def[0], op1[0], op2[0]);
2671 Instruction *hiPart3 = bld.mkOp3(OP_MAD, hTy, def[1], op1[0], op2[0], tmpRes2Hi)
[all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/ |
| nv50_ir_emit_gk110.cpp | 1010 uint32_t op2, op1; local
1016 op1 = 0xc10;
1020 op1 = 0xc30;
1024 op1 = 0xc28;
1029 op1 = 0;
1032 emitForm_21(i, op2, op1);
1113 uint16_t op1, op2; local
1117 case TYPE_F32: op2 = 0x1d8; op1 = 0xb58; break;
1118 case TYPE_F64: op2 = 0x1c0; op1 = 0xb40; break;
1121 op1 = 0xb30
[all...] |
| nv50_ir_peephole.cpp | 2575 Value *op1[2]; local
2577 bld.mkSplit(op1, 4, i->getSrc(0));
2579 op1[0] = i->getSrc(0);
2580 op1[1] = zero;
2602 bld.mkOp3(OP_MAD, hTy, tmpRes1Hi, op1[1], op2[0], op3[1]);
2604 bld.mkOp2(OP_MUL, hTy, tmpRes1Hi, op1[1], op2[0]);
2606 Value *tmpRes2Hi = bld.mkOp3v(OP_MAD, hTy, bld.getSSA(), op1[0], op2[1], tmpRes1Hi);
2614 bld.mkOp3(OP_MAD, hTy, def[0], op1[0], op2[0], op3[0])->setFlagsDef(1, carry);
2616 bld.mkOp2(OP_MUL, hTy, def[0], op1[0], op2[0]);
2618 Instruction *hiPart3 = bld.mkOp3(OP_MAD, hTy, def[1], op1[0], op2[0], tmpRes2Hi)
[all...] |
| /xsrc/external/mit/freetype/dist/src/psaux/ |
| psintrp.c | 506 FT_Byte op1; /* first opcode byte */ local
636 op1 = cf2_cmdRETURN; /* end of buffer for subroutine */
638 op1 = cf2_cmdENDCHAR; /* end of buffer for top level charstring */
642 op1 = (FT_Byte)cf2_buf_readByte( charstring );
646 if ( ( op1 == cf2_cmdRETURN || op1 == cf2_cmdENDCHAR ) &&
648 op1 = cf2_cmdRESERVED_0;
654 !( op1 == cf2_cmdHSTEM ||
655 op1 == cf2_cmdVSTEM ||
656 op1 == cf2_cmdHSBW |
[all...] |
| /xsrc/external/mit/libdrm/dist/freedreno/kgsl/ |
| msm_kgsl.h | 381 unsigned int op1; member in struct:kgsl_cff_user_event
|
| /xsrc/external/mit/MesaLib/dist/src/amd/compiler/ |
| aco_optimizer.cpp | 1800 Temp op1 = op_instr[i]->operands[1].getTemp(); local
1801 if (original_temp_id(ctx, op0) != original_temp_id(ctx, op1))
1804 op[i] = op1;
2126 /* op1(op2(1, 2), 0) if swap = false
2127 * op1(0, op2(1, 2)) if swap = true */
2129 match_op3_for_vop3(opt_ctx& ctx, aco_opcode op1, aco_opcode op2, Instruction* op1_instr, bool swap,
2135 if (op1_instr->opcode != op1)
|
| /xsrc/external/mit/MesaLib/dist/src/freedreno/vulkan/ |
| msm_kgsl.h | 655 unsigned int op1; member in struct:kgsl_cff_user_event
|
