1 /* $NetBSD: ssdfbvar.h,v 1.10 2021/08/05 22:31:20 tnn Exp $ */ 2 3 /* 4 * Copyright (c) 2019 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Tobias Nygren. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * cfdata attachment flags 34 */ 35 #define SSDFB_ATTACH_FLAG_PRODUCT_MASK 0x000000ff 36 #define SSDFB_ATTACH_FLAG_UPSIDEDOWN 0x00000100 37 #define SSDFB_ATTACH_FLAG_INVERSE 0x00000200 38 #define SSDFB_ATTACH_FLAG_CONSOLE 0x00000400 39 #define SSDFB_ATTACH_FLAG_MPSAFE 0x00000800 40 41 /* 42 * Fundamental commands 43 * SSD1306 Rev 1.1 p.28 44 * SH1106 Rev 0.1 p.19,20,22 45 */ 46 #define SSDFB_CMD_SET_CONTRAST_CONTROL 0x81 47 #define SSDFB_CMD_ENTIRE_DISPLAY_OFF 0xa4 48 #define SSDFB_CMD_ENTIRE_DISPLAY_ON 0xa5 49 #define SSDFB_CMD_SET_NORMAL_DISPLAY 0xa6 50 #define SSDFB_CMD_SET_INVERSE_DISPLAY 0xa7 51 #define SSDFB_CMD_SET_DISPLAY_OFF 0xae 52 #define SSDFB_CMD_SET_DISPLAY_ON 0xaf 53 54 /* 55 * Scrolling commands; SSD1306 Rev 1.1 p. 28 56 */ 57 #define SSDFB_CMD_VERTICAL_AND_RIGHT_SCROLL 0x29 58 #define SSDFB_CMD_VERTICAL_AND_LEFT_SCROLL 0x2a 59 #define SSDFB_CMD_DEACTIVATE_SCROLL 0x2e 60 #define SSDFB_CMD_ACTIVATE_SCROLL 0x2f 61 #define SSDFB_CMD_SET_VERTICAL_SCROLL_AREA 0xa3 62 63 /* 64 * Addressing commands 65 * SSD1306 Rev 1.1 p.30 66 * SH1106 Rev 0.1 p.18,22 67 */ 68 #define SSDFB_CMD_SET_LOWER_COLUMN_START_ADDRESS_BASE 0x00 69 #define SSDFB_CMD_SET_LOWER_COLUMN_START_ADDRESS_MAX 0x0f 70 #define SSDFB_CMD_SET_HIGHER_COLUMN_START_ADDRESS_BASE 0x10 71 #define SSDFB_CMD_SET_HIGHER_COLUMN_START_ADDRESS_MAX 0x1f 72 #define SSD1306_CMD_SET_MEMORY_ADDRESSING_MODE 0x20 73 #define SSD1306_MEMORY_ADDRESSING_MODE_HORIZONTAL 0x00 74 #define SSD1306_MEMORY_ADDRESSING_MODE_VERTICAL 0x01 75 #define SSD1306_MEMORY_ADDRESSING_MODE_PAGE 0x02 76 #define SSD1306_CMD_SET_COLUMN_ADDRESS 0x21 77 #define SSD1306_CMD_SET_PAGE_ADDRESS 0x22 78 #define SSDFB_CMD_SET_PAGE_START_ADDRESS_BASE 0xb0 79 #define SSDFB_CMD_SET_PAGE_START_ADDRESS_MAX 0xb7 80 81 /* 82 * Resolution & hardware layout commands 83 * SSD1306 Rev 1.1 p.31 84 * SH1106 Rev 0.1 p.19,20,21,23 85 */ 86 #define SSDFB_CMD_SET_DISPLAY_START_LINE_BASE 0x40 87 #define SSDFB_CMD_SET_DISPLAY_START_LINE_MAX 0x7f 88 #define SSDFB_CMD_SET_SEGMENT_REMAP_NORMAL 0xa0 89 #define SSDFB_CMD_SET_SEGMENT_REMAP_REVERSE 0xa1 90 #define SSDFB_CMD_SET_MULTIPLEX_RATIO 0xa8 91 #define SSDFB_CMD_SET_COM_OUTPUT_DIRECTION_NORMAL 0xc0 92 #define SSDFB_CMD_SET_COM_OUTPUT_DIRECTION_REMAP 0xc8 93 #define SSDFB_CMD_SET_DISPLAY_OFFSET 0xd3 94 #define SSDFB_CMD_SET_COM_PINS_HARDWARE_CFG 0xda 95 #define SSDFB_COM_PINS_A1_MASK 0x02 96 #define SSDFB_COM_PINS_ALTERNATIVE_MASK 0x10 97 #define SSDFB_COM_PINS_REMAP_MASK 0x20 98 99 /* 100 * Timing & driving commands 101 * SSD1306 Rev 1.1 p.32 102 * SH1106 Rev 0.1 p.24,25,26 103 */ 104 #define SSDFB_CMD_SET_DISPLAY_CLOCK_RATIO 0xd5 105 #define SSDFB_DISPLAY_CLOCK_DIVIDER_MASK __BITS(3, 0) 106 #define SSDFB_DISPLAY_CLOCK_OSCILLATOR_MASK __BITS(7, 4) 107 #define SSDFB_CMD_SET_PRECHARGE_PERIOD 0xd9 108 #define SSDFB_PRECHARGE_MASK __BITS(3, 0) 109 #define SSDFB_DISCHARGE_MASK __BITS(7, 4) 110 #define SSDFB_CMD_SET_VCOMH_DESELECT_LEVEL 0xdb 111 #define SSD1306_VCOMH_DESELECT_LEVEL_0_65_VCC 0x00 112 #define SSD1306_VCOMH_DESELECT_LEVEL_0_77_VCC 0x20 113 #define SSD1306_VCOMH_DESELECT_LEVEL_0_83_VCC 0x30 114 #define SH1106_VCOMH_DESELECT_LEVEL_DEFAULT 0x35 115 116 /* 117 * Misc commands 118 * SSD1306 Rev 1.1 p.32 119 * SH1106 Rev 0.1 p.27,28 120 */ 121 #define SSDFB_CMD_NOP 0xe3 122 #define SH1106_CMD_READ_MODIFY_WRITE 0xe0 123 #define SH1106_CMD_READ_MODIFY_WRITE_CANCEL 0xee 124 125 /* 126 * Charge pump commands 127 * SSD1306 App Note Rev 0.4 p.3 128 * SH1106 V0.1 p.18 129 */ 130 #define SSD1306_CMD_SET_CHARGE_PUMP 0x8d 131 #define SSD1306_CHARGE_PUMP_ENABLE 0x14 132 #define SSD1306_CHARGE_PUMP_DISABE 0x10 133 #define SH1106_CMD_SET_CHARGE_PUMP_7V4 0x30 134 #define SH1106_CMD_SET_CHARGE_PUMP_8V0 0x31 135 #define SH1106_CMD_SET_CHARGE_PUMP_8V4 0x32 136 #define SH1106_CMD_SET_CHARGE_PUMP_9V0 0x33 137 138 /* 139 * DC-DC commands 140 * SH1106 V0.1 p.18 141 */ 142 #define SH1106_CMD_SET_DC_DC 0xad 143 #define SH1106_DC_DC_OFF 0x8a 144 #define SH1106_DC_DC_ON 0x8b 145 146 /* 147 * SSD1322 command set 148 */ 149 #define SSD1322_CMD_ENABLE_GRAY_SCALE_TABLE 0x00 150 #define SSD1322_CMD_SET_COLUMN_ADDRESS 0x15 151 #define SSD1322_CMD_WRITE_RAM 0x5c 152 #define SSD1322_CMD_READ_RAM 0x5d 153 #define SSD1322_CMD_SET_ROW_ADDRESS 0x75 154 #define SSD1322_CMD_SET_REMAP_AND_DUAL_COM_LINE_MODE 0xa0 155 #define SSD1322_CMD_SET_DISPLAY_START_LINE 0xa1 156 #define SSD1322_CMD_SET_DISPLAY_OFFSET 0xa2 157 158 #define SSD1322_CMD_ENTIRE_DISPLAY_OFF SSDFB_CMD_ENTIRE_DISPLAY_OFF 159 #define SSD1322_CMD_ENTIRE_DISPLAY_ON SSDFB_CMD_ENTIRE_DISPLAY_ON 160 #define SSD1322_CMD_NORMAL_DISPLAY SSDFB_CMD_SET_NORMAL_DISPLAY 161 #define SSD1322_CMD_INVERSE_DISPLAY SSDFB_CMD_SET_INVERSE_DISPLAY 162 #define SSD1322_CMD_SET_SLEEP_MODE_ON SSDFB_CMD_SET_DISPLAY_OFF 163 #define SSD1322_CMD_SET_SLEEP_MODE_OFF SSDFB_CMD_SET_DISPLAY_ON 164 165 #define SSD1322_CMD_ENABLE_PARTIAL_DISPLAY 0xa8 166 #define SSD1322_CMD_EXIT_PARTIAL_DISPLAY 0xa9 167 #define SSD1322_CMD_FUNCTION_SELECTION 0xab 168 #define SSD1322_FUNCTION_SELECTION_EXTERNAL_VDD 0 169 #define SSD1322_FUNCTION_SELECTION_INTERNAL_VDD __BIT(0) 170 #define SSD1322_CMD_SET_PHASE_LENGTH 0xb1 171 #define SSD1322_PHASE_LENGTH_PHASE_2_MASK __BITS(7, 4) 172 #define SSD1322_DEFAULT_PHASE_2 7 173 #define SSD1322_PHASE_LENGTH_PHASE_1_MASK __BITS(3, 0) 174 #define SSD1322_DEFAULT_PHASE_1 4 175 #define SSD1322_CMD_SET_FRONT_CLOCK_DIVIDER 0xb3 176 #define SSD1322_FREQUENCY_MASK __BITS(7, 4) 177 #define SSD1322_DEFAULT_FREQUENCY 5 178 #define SSD1322_DIVIDER_MASK __BITS(3, 0) 179 #define SSD1322_DEFAULT_DIVIDER 0 180 #define SSD1322_CMD_DISPLAY_ENHANCEMENT_A 0xb4 181 #define SSD1322_DISPLAY_ENHANCEMENT_A_MAGIC1 0xa2 182 #define SSD1322_DISPLAY_ENHANCEMENT_A_MAGIC2 0xb5 183 #define SSD1322_CMD_SET_GPIO 0xb5 184 #define SSD1322_GPIO0_DISABLED 0 185 #define SSD1322_GPIO0_TRISTATE __BIT(0) 186 #define SSD1322_GPIO0_LOW __BIT(1) 187 #define SSD1322_GPIO0_HIGH __BITS(1, 0) 188 #define SSD1322_GPIO1_DISABLED 0 189 #define SSD1322_GPIO1_TRISTATE __BIT(2) 190 #define SSD1322_GPIO1_LOW __BIT(3) 191 #define SSD1322_GPIO1_HIGH __BITS(3, 2) 192 #define SSD1322_CMD_SET_SECOND_PRECHARGE_PERIOD 0xb6 193 #define SSD1322_DEFAULT_SECOND_PRECHARGE_PERIOD 8 194 #define SSD1322_CMD_SET_GRAY_SCALE_TABLE 0xb8 195 #define SSD1322_CMD_SET_DEFAULT_GRAY_SCALE_TABLE 0xb9 196 #define SSD1322_CMD_SET_PRE_CHARGE_VOLTAGE_LEVEL 0xbb 197 #define SSD1322_DEFAULT_PRE_CHARGE_VOLTAGE_LEVEL 0x17 198 #define SSD1322_CMD_SET_VCOMH 0xbe 199 #define SSD1322_DEFAULT_VCOMH 0x04 200 #define SSD1322_CMD_SET_CONTRAST_CURRENT 0xc1 201 #define SSD1322_DEFAULT_CONTRAST_CURRENT 0x7f 202 #define SSD1322_CMD_MASTER_CONTRAST_CURRENT_CONTROL 0xc7 203 #define SSD1322_DEFAULT_MASTER_CONTRAST_CURRENT_CONTROL 0xf 204 #define SSD1322_CMD_SET_MULTIPLEX_RATIO 0xca 205 #define SSD1322_CMD_DISPLAY_ENHANCEMENT_B 0xd1 206 #define SSD1322_DISPLAY_ENHANCEMENT_B_MAGIC1 0xa2 207 #define SSD1322_DISPLAY_ENHANCEMENT_B_MAGIC2 0x20 208 #define SSD1322_CMD_SET_COMMAND_LOCK 0xfd 209 #define SSD1322_COMMAND_UNLOCK_MAGIC 0x12 210 #define SSD1322_COMMAND_LOCK_MAGIC 0x16 211 /* undocumented on this chip, but works in practice */ 212 #define SSD1322_CMD_NOP SSDFB_CMD_NOP 213 214 /* 215 * SSD1353 command set 216 */ 217 #define SSD1353_CMD_SET_COLUMN_ADDRESS SSD1322_CMD_SET_COLUMN_ADDRESS 218 #define SSD1353_CMD_DRAW_LINE 0x21 219 #define SSD1353_CMD_DRAW_RECTANGLE 0x22 220 #define SSD1353_CMD_COPY 0x23 221 #define SSD1353_CMD_DIM 0x24 222 #define SSD1353_CMD_CLEAR_WINDOW 0x25 223 #define SSD1353_CMD_FILL_ENABLE 0x26 224 #define SSD1353_CMD_SCROLLING_SETUP 0x27 225 #define SSD1353_CMD_DEACTIVATE_SCROLL SSDFB_CMD_DEACTIVATE_SCROLL 226 #define SSD1353_CMD_ACTIVATE_SCROLL SSDFB_CMD_ACTIVATE_SCROLL 227 #define SSD1353_CMD_WRITE_RAM SSD1322_CMD_WRITE_RAM 228 #define SD1353_CMD_READ_RAM SSD1322_CMD_READ_RAM 229 #define SSD1353_CMD_SET_ROW_ADDRESS SSD1322_CMD_SET_ROW_ADDRESS 230 #define SSD1353_CMD_SET_CONTRAST_CONTROL_A 0x81 231 #define SSD1353_CMD_SET_CONTRAST_CONTROL_B 0x82 232 #define SSD1353_CMD_SET_CONTRAST_CONTROL_C 0x83 233 #define SSD1353_DEFAULT_CONTRAST_CONTROL 128 234 #define SSD1353_CMD_MASTER_CURRENT_CONTROL 0x87 235 #define SSD1353_DEFAULT_MASTER_CURRENT_ATTENUATION 15 236 #define SSD1353_CMD_SET_SECOND_PRECHARGE_SPEED 0x8a 237 #define SSD1353_DEFAULT_SECOND_PRECHARGE_SPEED 2 238 #define SSD1353_CMD_REMAP_COLOR_DEPTH 0xa0 239 #define SSD1353_REMAP_NO_INCREMENT __BIT(0) 240 #define SSD1353_REMAP_SEG_DIRECTION __BIT(1) 241 #define SSD1353_REMAP_RGB __BIT(2) 242 #define SSD1353_REMAP_LR __BIT(3) 243 #define SSD1353_REMAP_COM_DIRECTION __BIT(4) 244 #define SSD1353_REMAP_SPLIT_ODD_EVEN __BIT(5) 245 #define SSD1353_REMAP_PIXEL_FORMAT_MASK __BITS(7, 6) 246 #define SSD1353_CMD_SET_DISPLAY_START_LINE SSD1322_CMD_SET_DISPLAY_START_LINE 247 #define SSD1353_CMD_SET_DISPLAY_OFFSET SSD1322_CMD_SET_DISPLAY_OFFSET 248 #define SSD1353_CMD_SET_VERTICAL_SCROLL_AREA SSDFB_CMD_SET_VERTICAL_SCROLL_AREA 249 #define SSD1353_CMD_NORMAL_DISPLAY 0xa4 250 #define SSD1353_CMD_ENTIRE_DISPLAY_ON 0xa5 251 #define SSD1353_CMD_ENTIRE_DISPLAY_OFF 0xa6 252 #define SSD1353_CMD_INVERSE_DISPLAY SSDFB_CMD_SET_INVERSE_DISPLAY 253 #define SSD1353_CMD_SET_MULTIPLEX_RATIO SSDFB_CMD_SET_MULTIPLEX_RATIO 254 #define SSD1353_CMD_DIM_MODE_SETTING 0xab 255 #define SSD1353_CMD_SET_DISPLAY_ON_DIM 0xac 256 #define SSD1353_CMD_SET_DISPLAY_OFF SSDFB_CMD_SET_DISPLAY_OFF 257 #define SSD1353_CMD_SET_DISPLAY_ON SSDFB_CMD_SET_DISPLAY_ON 258 #define SSD1353_CMD_SET_PHASE_LENGTH SSD1322_CMD_SET_PHASE_LENGTH 259 #define SSD1353_DEFAULT_PHASE_2 7 260 #define SSD1353_DEFAULT_PHASE_1 4 261 #define SSD1353_CMD_SET_FRONT_CLOCK_DIVIDER SSD1322_CMD_SET_FRONT_CLOCK_DIVIDER 262 #define SSD1353_DEFAULT_DIVIDER 0 263 #define SSD1353_DEFAULT_FREQUENCY 12 264 #define SSD1353_CMD_SET_SECOND_PRECHARGE_PERIOD 0xb4 265 #define SSD1353_DEFAULT_SECOND_PRECHARGE_PERIOD 7 266 #define SSD1353_CMD_SET_GRAY_SCALE_TABLE SSD1322_CMD_SET_GRAY_SCALE_TABLE 267 #define SSD1353_CMD_SET_DEFAULT_GRAY_SCALE_TABLE SSD1322_CMD_SET_DEFAULT_GRAY_SCALE_TABLE 268 #define SSD1353_CMD_SET_PRE_CHARGE_VOLTAGE_LEVEL SSD1322_CMD_SET_PRE_CHARGE_VOLTAGE_LEVEL 269 #define SSD1353_DEFAULT_PRE_CHARGE_VOLTAGE_LEVEL 0x3e 270 #define SSD1353_CMD_SET_VCOMH SSD1322_CMD_SET_VCOMH 271 #define SSD1353_DEFAULT_VCOMH 0x3c 272 #define SSD1353_CMD_OTP_WRITE 0xc0 273 #define SSD1353_CMD_RESET 0xe2 274 #define SSD1353_CMD_NOP SSDFB_CMD_NOP 275 #define SSD1353_CMD_SET_COMMAND_LOCK SSD1322_CMD_SET_COMMAND_LOCK 276 #define SSD1353_COMMAND_UNLOCK_MAGIC SSD1322_COMMAND_UNLOCK_MAGIC 277 #define SSD1353_COMMAND_LOCK_MAGIC SSD1353_COMMAND_LOCK_MAGIC 278 279 struct ssdfb_softc; 280 281 typedef enum { 282 SSDFB_CONTROLLER_UNKNOWN=0, 283 SSDFB_CONTROLLER_SSD1306=1, 284 SSDFB_CONTROLLER_SH1106=2, 285 SSDFB_CONTROLLER_SSD1322=3, 286 SSDFB_CONTROLLER_SSD1353=4, 287 } ssdfb_controller_id_t; 288 289 typedef enum { 290 SSDFB_PRODUCT_UNKNOWN=0, 291 SSDFB_PRODUCT_SSD1306_GENERIC=1, 292 SSDFB_PRODUCT_SH1106_GENERIC=2, 293 SSDFB_PRODUCT_ADAFRUIT_931=3, 294 SSDFB_PRODUCT_ADAFRUIT_938=4, 295 SSDFB_PRODUCT_SSD1322_GENERIC=5, 296 SSDFB_PRODUCT_SSD1353_GENERIC=6, 297 SSDFB_PRODUCT_DEP_160128A_RGB=7, 298 } ssdfb_product_id_t; 299 300 #define SSDFB_I2C_DEFAULT_ADDR 0x3c 301 #define SSDFB_I2C_ALTERNATIVE_ADDR 0x3d 302 303 /* Co bit has different behaviour in SSD1306 and SH1106 */ 304 #define SSDFB_I2C_CTRL_BYTE_CONTINUATION_MASK __BIT(7) 305 #define SSDFB_I2C_CTRL_BYTE_DATA_MASK __BIT(6) 306 307 union ssdfb_block { 308 uint8_t col[8]; 309 uint64_t raw; 310 }; 311 312 struct ssdfb_product { 313 ssdfb_product_id_t p_product_id; 314 ssdfb_controller_id_t p_controller_id; 315 const char *p_name; 316 int p_width; 317 int p_height; 318 int p_bits_per_pixel; 319 bool p_rgb; 320 int p_panel_shift; 321 uint8_t p_fosc; 322 uint8_t p_fosc_div; 323 uint8_t p_precharge; 324 uint8_t p_discharge; 325 uint8_t p_compin_cfg; 326 uint8_t p_vcomh_deselect_level; 327 uint8_t p_default_contrast; 328 uint8_t p_multiplex_ratio; 329 int (*p_init)(struct ssdfb_softc *); 330 int (*p_sync)(struct ssdfb_softc *, bool); 331 }; 332 333 struct ssdfb_softc { 334 device_t sc_dev; 335 const struct ssdfb_product *sc_p; 336 337 /* wscons & rasops state */ 338 u_int sc_mode; 339 int sc_fontcookie; 340 struct wsdisplay_font *sc_font; 341 struct wsscreen_descr sc_screen_descr; 342 const struct wsscreen_descr *sc_screens[1]; 343 struct wsscreen_list sc_screenlist; 344 struct rasops_info sc_ri; 345 size_t sc_ri_bits_len; 346 struct wsdisplay_emulops sc_orig_riops; 347 int sc_nscreens; 348 device_t sc_wsdisplay; 349 bool sc_is_console; 350 bool sc_usepoll; 351 352 /* hardware state */ 353 bool sc_upsidedown; 354 bool sc_inverse; 355 uint8_t sc_contrast; 356 bool sc_display_on; 357 union ssdfb_block *sc_gddram; 358 size_t sc_gddram_len; 359 360 /* damage tracking */ 361 lwp_t *sc_thread; 362 kcondvar_t sc_cond; 363 kmutex_t sc_cond_mtx; 364 bool sc_detaching; 365 int sc_backoff; 366 bool sc_modified; 367 struct uvm_object *sc_uobj; 368 369 /* reference to bus-specific code */ 370 void *sc_cookie; 371 int (*sc_cmd)(void *, uint8_t *, size_t, bool); 372 int (*sc_transfer_rect)(void *, uint8_t, uint8_t, uint8_t, uint8_t, 373 uint8_t *, size_t, bool); 374 }; 375 376 void ssdfb_attach(struct ssdfb_softc *, int flags); 377 int ssdfb_detach(struct ssdfb_softc *); 378
Indexes created Sat Sep 20 22:09:52 GMT 2025