| /src/sys/arch/sparc64/sparc64/ |
| intr.c | 230 ("%s: level %x ivec %x inumber %x pil %x\n",
249 printf("\nintr_establish: NULL vector fun %p arg %p pil %p\n",
279 printf("\nintr_establish: vector %x pil %x mapintr %p "
296 sparc_softintr_establish(int pil, int (*fun)(void *), void *arg)
302 ih->ih_pil = pil;
333 int pil; local in function:softint_init_md
337 pil = IPL_SOFTBIO;
340 pil = IPL_SOFTNET;
343 pil = IPL_SOFTSERIAL;
346 pil = IPL_SOFTCLOCK
[all...] |
| /src/sys/arch/sparc/dev/ |
| sbus.c | 580 int pil; local in function:sbus_intr_establish
588 pil = pri & ~SBUS_INTR_COMPAT;
590 pil = sc->sc_intr2ipl[pri];
594 intr_establish(pil, level, ih, fastvec, false);
|
| vme_machdep.c | 753 int pil; local in function:sparc_vme_intr_establish
756 pil = vme_ipl_to_pil[svih->pri];
758 if (level < pil)
759 panic("vme_intr_establish: class lvl (%d) < pil (%d)\n",
760 level, pil);
769 for (ih = intrhand[pil]; ih != NULL; ih = ih->ih_next)
777 intr_establish(pil, 0, ih, NULL, false);
|
| /src/sys/arch/sparc/sparc/ |
| intr.c | 707 panic("intr_establish: class lvl (%d) < pil (%d)\n",
710 /* pre-shift to PIL field in %psr */
743 int sic_pil; /* Actual machine PIL that is used */
770 int pil; local in function:sparc_softintr_establish
783 pil = pilreq = level;
787 pil = 1;
790 pil = 4;
793 pil = 6;
799 sic->sic_pil = pil;
819 * pre-shift to PIL field in %ps
[all...] |
| pci_machdep.c | 497 int pil; local in function:pci_intr_string
499 pil = mspcic_assigned_interrupt(ih);
500 snprintf(buf, len, "line %d (pil %d)", ih, pil);
541 * pil the handler was established for, but we don't need to
|
| msiiep.c | 381 * Get the PIL currently assigned for this interrupt input line.
552 * for ms-IIep. The PIL for each line is programmable via pcic interrupt
561 int pil; local in function:mspcic_intr_establish
565 /* use pil set-up by prom */
566 pil = mspcic_assigned_interrupt(line);
567 if (pil == -1)
572 intr_establish(pil, ipl, ih, fastvec, false);
|
| cpu.c | 729 u_int pil; local in function:xcall
759 pil = (getpsr() & PSR_PIL) >> 8;
761 if (cold || pil <= IPL_SCHED)
775 cpu_number(), func, pil, pc);
814 raise_ipi(cpi,13+fasttrap);/*xcall_cookie->pil*/
|
| /src/sys/dev/pci/ |
| pccbb.c | 1100 struct pccbb_intrhand_list *pil; local in function:pccbbintr_function
1103 LIST_FOREACH(pil, &sc->sc_pil, pil_next) {
1104 s = splraiseipl(pil->pil_icookie);
1105 val = (*pil->pil_func)(pil->pil_arg);
1709 struct pccbb_intrhand_list *pil, *newpil; local in function:pccbb_intr_establish
1732 for (pil = LIST_FIRST(&sc->sc_pil);
1733 LIST_NEXT(pil, pil_next) != NULL;
1734 pil = LIST_NEXT(pil, pil_next))
1757 struct pccbb_intrhand_list *pil; local in function:pccbb_intr_disestablish
[all...] |
| /src/sys/arch/sparc64/include/ |
| psl.h | 53 * | impl | ver | icc | reserved |E|E| pil |S|P|E| CWP |
426 * GCC pseudo-functions for manipulating PIL
445 __asm volatile("rdpr %%pil,%0" : "=r" (oldpil)); \
447 __asm volatile("wrpr %%g0,%0,%%pil" : : "n" (newpil) : "memory"); \
455 __asm volatile("rdpr %%pil,%0" : "=r" (oldpil)); \
459 __asm volatile("wrpr %%g0,%0,%%pil" : : "n" (newpil) : "memory"); \
469 __asm volatile("rdpr %%pil,%0" : "=r" (oldpil)); \
470 __asm volatile("wrpr %%g0,%0,%%pil" : : "n" (newpil) : "memory"); \
478 __asm volatile("rdpr %%pil,%0" : "=r" (oldpil)); \
481 __asm volatile("wrpr %%g0,%0,%%pil" : : "n" (newpil) : "memory");
553 int pil; variable in typeref:typename:int
[all...] |
