| /src/external/gpl3/gcc/dist/gcc/config/nds32/ |
| nds32-cost.cc | 530 rtx plus0, plus1; local
564 plus1 = XEXP (address, 1);
566 if (REG_P (plus0) && CONST_INT_P (plus1))
568 else if (ARITHMETIC_P (plus0) || ARITHMETIC_P (plus1))
570 else if (REG_P (plus0) && REG_P (plus1))
586 rtx plus0, plus1; local
620 plus1 = XEXP (address, 1);
622 if (REG_P (plus0) && CONST_INT_P (plus1))
626 if (satisfies_constraint_Iu03 (plus1))
631 if (ARITHMETIC_P (plus0) || ARITHMETIC_P (plus1))
649 rtx plus0, plus1; local
[all...] |
| nds32-md-auxiliary.cc | 434 rtx plus1 = gen_int_mode (INTVAL (operands[2]) + 1, SImode); local
435 if (satisfies_constraint_Is15 (plus1))
437 operands[2] = plus1;
575 rtx plus1 = gen_int_mode (INTVAL (operands[2]) + 1, SImode); local
576 if (satisfies_constraint_Is15 (plus1))
578 operands[2] = plus1;
|
| /src/external/gpl3/gcc.old/dist/gcc/config/nds32/ |
| nds32-cost.cc | 530 rtx plus0, plus1; local
564 plus1 = XEXP (address, 1);
566 if (REG_P (plus0) && CONST_INT_P (plus1))
568 else if (ARITHMETIC_P (plus0) || ARITHMETIC_P (plus1))
570 else if (REG_P (plus0) && REG_P (plus1))
586 rtx plus0, plus1; local
620 plus1 = XEXP (address, 1);
622 if (REG_P (plus0) && CONST_INT_P (plus1))
626 if (satisfies_constraint_Iu03 (plus1))
631 if (ARITHMETIC_P (plus0) || ARITHMETIC_P (plus1))
649 rtx plus0, plus1; local
[all...] |
| nds32-md-auxiliary.cc | 434 rtx plus1 = gen_int_mode (INTVAL (operands[2]) + 1, SImode); local
435 if (satisfies_constraint_Is15 (plus1))
437 operands[2] = plus1;
575 rtx plus1 = gen_int_mode (INTVAL (operands[2]) + 1, SImode); local
576 if (satisfies_constraint_Is15 (plus1))
578 operands[2] = plus1;
|
| /src/external/gpl3/gcc/dist/gcc/config/iq2000/ |
| iq2000.cc | 457 rtx addr, plus0, plus1;
483 plus1 = XEXP (addr, 1);
485 code1 = GET_CODE (plus1);
490 addr = plus1;
497 addr = plus1;
526 addr = plus1;
842 rtx plus1 = XEXP (addr, 1);
844 if (GET_CODE (plus0) != REG && GET_CODE (plus1) == REG)
845 plus0 = XEXP (addr, 1), plus1 = XEXP (addr, 0);
850 switch (GET_CODE (plus1))
452 rtx addr, plus0, plus1; local
834 rtx plus1 = XEXP (addr, 1); local
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/iq2000/ |
| iq2000.cc | 458 rtx addr, plus0, plus1;
484 plus1 = XEXP (addr, 1);
486 code1 = GET_CODE (plus1);
491 addr = plus1;
498 addr = plus1;
527 addr = plus1;
843 rtx plus1 = XEXP (addr, 1);
845 if (GET_CODE (plus0) != REG && GET_CODE (plus1) == REG)
846 plus0 = XEXP (addr, 1), plus1 = XEXP (addr, 0);
851 switch (GET_CODE (plus1))
453 rtx addr, plus0, plus1; local
835 rtx plus1 = XEXP (addr, 1); local
[all...] |
| /src/external/gpl3/gcc/dist/gcc/config/microblaze/ |
| microblaze.cc | 288 rtx addr, plus0, plus1; local
312 plus1 = XEXP (addr, 1);
317 if (GET_CODE (plus0) == REG && GET_CODE (plus1) == CONST_INT
318 && SMALL_INT (plus1))
322 else if (GET_CODE (plus1) == REG && GET_CODE (plus0) == CONST_INT)
326 else if (GET_CODE (plus0) == REG && GET_CODE (plus1) == REG)
|
| /src/external/gpl3/gcc/dist/gcc/config/xtensa/ |
| xtensa.cc | 2471 rtx plus1 = XEXP (x, 1);
2473 if (GET_CODE (plus0) != REG && GET_CODE (plus1) == REG)
2476 plus1 = XEXP (x, 0);
2481 && GET_CODE (plus1) == CONST_INT
2482 && !xtensa_mem_offset (INTVAL (plus1), mode)
2483 && !xtensa_simm8 (INTVAL (plus1))
2484 && xtensa_mem_offset (INTVAL (plus1) & 0xff, mode)
2485 && xtensa_simm8x256 (INTVAL (plus1) & ~0xff))
2488 rtx addmi_offset = GEN_INT (INTVAL (plus1) & ~0xff);
2491 return gen_rtx_PLUS (Pmode, temp, GEN_INT (INTVAL (plus1) & 0xff))
2469 rtx plus1 = XEXP (x, 1); local
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/microblaze/ |
| microblaze.cc | 289 rtx addr, plus0, plus1; local
313 plus1 = XEXP (addr, 1);
318 if (GET_CODE (plus0) == REG && GET_CODE (plus1) == CONST_INT
319 && SMALL_INT (plus1))
323 else if (GET_CODE (plus1) == REG && GET_CODE (plus0) == CONST_INT)
327 else if (GET_CODE (plus0) == REG && GET_CODE (plus1) == REG)
|
| /src/external/gpl3/gcc.old/dist/gcc/config/xtensa/ |
| xtensa.cc | 1997 rtx plus1 = XEXP (x, 1);
1999 if (GET_CODE (plus0) != REG && GET_CODE (plus1) == REG)
2002 plus1 = XEXP (x, 0);
2007 && GET_CODE (plus1) == CONST_INT
2008 && !xtensa_mem_offset (INTVAL (plus1), mode)
2009 && !xtensa_simm8 (INTVAL (plus1))
2010 && xtensa_mem_offset (INTVAL (plus1) & 0xff, mode)
2011 && xtensa_simm8x256 (INTVAL (plus1) & ~0xff))
2014 rtx addmi_offset = GEN_INT (INTVAL (plus1) & ~0xff);
2017 return gen_rtx_PLUS (Pmode, temp, GEN_INT (INTVAL (plus1) & 0xff))
1995 rtx plus1 = XEXP (x, 1); local
[all...] |
| /src/external/gpl3/gcc/dist/gcc/config/arc/ |
| arc.cc | 2422 rtx plus1 = XEXP (addr, 1); local
2431 switch (GET_CODE (plus1))
2434 return (!RTX_OK_FOR_OFFSET_P (SImode, plus1)
2439 && satisfies_constraint_O (plus1))
2445 && arc_check_short_reg_p (plus1))
10673 rtx addr, plus0, plus1;
10708 plus1 = XEXP (addr, 1);
10713 && ((GET_CODE (plus1) == REG)
10714 && ((REGNO (plus1) >= FIRST_PSEUDO_REGISTER)
10715 || COMPACT_GP_REG_P (REGNO (plus1)))))
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/arc/ |
| arc.cc | 2498 rtx plus1 = XEXP (addr, 1); local
2507 switch (GET_CODE (plus1))
2510 return (!RTX_OK_FOR_OFFSET_P (SImode, plus1)
2515 && satisfies_constraint_O (plus1))
2521 && satisfies_constraint_Rcq (plus1))
10899 rtx addr, plus0, plus1;
10934 plus1 = XEXP (addr, 1);
10939 && ((GET_CODE (plus1) == REG)
10940 && ((REGNO (plus1) >= FIRST_PSEUDO_REGISTER)
10941 || COMPACT_GP_REG_P (REGNO (plus1)))))
10898 rtx addr, plus0, plus1; local
[all...] |
