1 /* $NetBSD: pmap_motorola.h,v 1.50 2025/11/17 05:59:51 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1991, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * the Systems Programming Group of the University of Utah Computer 9 * Science Department. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * @(#)pmap.h 8.1 (Berkeley) 6/10/93 36 */ 37 38 /* 39 * Copyright (c) 1987 Carnegie-Mellon University 40 * 41 * This code is derived from software contributed to Berkeley by 42 * the Systems Programming Group of the University of Utah Computer 43 * Science Department. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice, this list of conditions and the following disclaimer. 50 * 2. Redistributions in binary form must reproduce the above copyright 51 * notice, this list of conditions and the following disclaimer in the 52 * documentation and/or other materials provided with the distribution. 53 * 3. All advertising materials mentioning features or use of this software 54 * must display the following acknowledgement: 55 * This product includes software developed by the University of 56 * California, Berkeley and its contributors. 57 * 4. Neither the name of the University nor the names of its contributors 58 * may be used to endorse or promote products derived from this software 59 * without specific prior written permission. 60 * 61 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 62 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 63 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 64 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 65 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 66 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 67 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 68 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 69 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 70 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 71 * SUCH DAMAGE. 72 * 73 * @(#)pmap.h 8.1 (Berkeley) 6/10/93 74 */ 75 76 #ifndef _M68K_PMAP_MOTOROLA_H_ 77 #define _M68K_PMAP_MOTOROLA_H_ 78 79 #ifdef _KERNEL_OPT 80 #include "opt_m68k_arch.h" 81 #endif 82 83 #include <sys/kcore.h> 84 #include <m68k/kcore.h> 85 86 #include <machine/cpu.h> 87 #include <machine/pte.h> 88 89 /* 90 * Pmap stuff 91 */ 92 struct pmap { 93 pt_entry_t *pm_ptab; /* KVA of page table */ 94 st_entry_t *pm_stab; /* KVA of segment table */ 95 u_int pm_stfree; /* 040: free lev2 blocks */ 96 st_entry_t *pm_stpa; /* 040: ST phys addr */ 97 uint16_t pm_sref; /* segment table ref count */ 98 u_int pm_count; /* pmap reference count */ 99 struct pmap_statistics pm_stats; /* pmap statistics */ 100 int pm_ptpages; /* more stats: PT pages */ 101 }; 102 103 /* 104 * Root Pointer attributes for Supervisor and User modes. 105 * 106 * Supervisor: 107 * - No index limit (Lower limit == 0) 108 * - Points to Short format descriptor table. 109 * - Shared Globally 110 * 111 * User: 112 * - No index limit (Lower limit == 0) 113 * - Points to Short format descriptor table. 114 */ 115 #define MMU51_SRP_BITS (DTE51_LOWER | DTE51_SG | DT51_SHORT) 116 #define MMU51_CRP_BITS (DTE51_LOWER | DT51_SHORT) 117 118 /* 119 * MMU specific segment values 120 * 121 * We are using following segment layout in m68k pmap_motorola.c: 122 * 68020/030 4KB/page: l1,l2,page == 10,10,12 (%tc = 0x82c0aa00) 123 * 68020/030 8KB/page: l1,l2,page == 8,11,13 (%tc = 0x82d08b00) 124 * 68040/060 4KB/page: l1,l2,l3,page == 7,7,6,12 (%tc = 0x8000) 125 * 68040/060 8KB/page: l1,l2,l3,page == 7,7,5,13 (%tc = 0xc000) 126 * 127 * 68020/030 l2 size is chosen per NPTEPG, a number of page table entries 128 * per page, to use one whole page for PTEs per one segment table entry, 129 * and maybe also because 68020 HP MMU machines use similar structures. 130 * 131 * 68040/060 layout is defined by hardware design and not configurable, 132 * as defined in <m68k/pte_motorola.h>. 133 * 134 * Even on 68040/060, we still appropriate 2-level ste-pte pmap structures 135 * for 68020/030 (derived from 4.4BSD/hp300) to handle 040's 3-level MMU. 136 * TIA_SIZE and TIB_SIZE are used to represent such pmap structures and 137 * they are also referred on 040/060. 138 * 139 * NBSEG and SEGOFSET are used to check l2 STE of the specified VA, 140 * so they have different values between 020/030 and 040/060. 141 */ 142 /* 8KB / 4KB */ 143 #define TIB_SHIFT (PGSHIFT - 2) /* 11 / 10 */ 144 #define TIB_SIZE (1U << TIB_SHIFT) /* 2048 / 1024 */ 145 #define TIA_SHIFT (32 - TIB_SHIFT - PGSHIFT) /* 8 / 10 */ 146 #define TIA_SIZE (1U << TIA_SHIFT) /* 256 / 1024 */ 147 148 #define MMU51_TCR_BITS (TCR51_E | TCR51_SRE | \ 149 __SHIFTIN(PGSHIFT, TCR51_PS) | \ 150 __SHIFTIN(TIA_SHIFT, TCR51_TIA) | \ 151 __SHIFTIN(TIB_SHIFT, TCR51_TIB)) 152 #define MMU40_TCR_BITS (TCR40_E | \ 153 __SHIFTIN(PGSHIFT - 12, TCR40_P)) 154 155 #define SEGSHIFT (TIB_SHIFT + PGSHIFT) /* 24 / 22 */ 156 157 #define NBSEG30 (1U << SEGSHIFT) 158 #define NBSEG40 (1U << SG4_SHIFT2) 159 160 #if ( defined(M68020) || defined(M68030)) && \ 161 (!defined(M68040) && !defined(M68060)) 162 #define NBSEG NBSEG30 163 #elif ( defined(M68040) || defined(M68060)) && \ 164 (!defined(M68020) && !defined(M68030)) 165 #define NBSEG NBSEG40 166 #else 167 #define NBSEG ((mmutype == MMU_68040) ? NBSEG40 : NBSEG30) 168 #endif 169 170 #define SEGOFSET (NBSEG - 1) /* byte offset into segment */ 171 172 #define m68k_round_seg(x) ((((vaddr_t)(x)) + SEGOFSET) & ~SEGOFSET) 173 #define m68k_trunc_seg(x) ((vaddr_t)(x) & ~SEGOFSET) 174 #define m68k_seg_offset(x) ((vaddr_t)(x) & SEGOFSET) 175 176 /* 177 * On the 040, we keep track of which level 2 blocks are already in use 178 * with the pm_stfree mask. Bits are arranged from LSB (block 0) to MSB 179 * (block 31). For convenience, the level 1 table is considered to be 180 * block 0. 181 * 182 * MAX[KU]L2SIZE control how many pages of level 2 descriptors are allowed 183 * for the kernel and users. 184 * 16 or 8 implies only the initial "segment table" page is used, 185 * i.e. it means PAGE_SIZE / (SG4_LEV1SIZE * sizeof(st_entry_t)). 186 * WARNING: don't change MAXUL2SIZE unless you can allocate 187 * physically contiguous pages for the ST in pmap_motorola.c! 188 */ 189 #define MAXKL2SIZE 32 190 #if PAGE_SIZE == 8192 /* NBPG / (SG4_LEV1SIZE * sizeof(st_entry_t)) */ 191 #define MAXUL2SIZE 16 192 #else 193 #define MAXUL2SIZE 8 194 #endif 195 #define l2tobm(n) (1U << (n)) 196 #define bmtol2(n) (ffs(n) - 1) 197 198 /* 199 * For each struct vm_page, there is a list of all currently valid virtual 200 * mappings of that page. An entry is a pv_entry, the list is pv_table. 201 */ 202 struct pv_entry { 203 struct pv_entry *pv_next; /* next pv_entry */ 204 struct pmap *pv_pmap; /* pmap where mapping lies */ 205 vaddr_t pv_va; /* virtual address for mapping */ 206 st_entry_t *pv_ptste; /* non-zero if VA maps a PT page */ 207 struct pmap *pv_ptpmap; /* if pv_ptste, pmap for PT page */ 208 }; 209 210 extern struct pv_header *pv_table; /* array of entries, one per page */ 211 212 #define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count) 213 #define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count) 214 215 #define pmap_update(pmap) __nothing /* nothing (yet) */ 216 217 static __inline bool 218 pmap_remove_all(struct pmap *pmap) 219 { 220 /* Nothing. */ 221 return false; 222 } 223 224 extern paddr_t Sysseg_pa; 225 extern st_entry_t *Sysseg; 226 extern pt_entry_t *Sysmap, *Sysptmap; 227 #define SYSMAP_VA VM_MAX_KERNEL_ADDRESS 228 extern vsize_t Sysptsize; 229 extern vaddr_t virtual_avail, virtual_end; 230 #if defined(M68040) || defined(M68060) 231 extern u_int protostfree; 232 #endif 233 234 extern char *vmmap; /* map for mem, dumps, etc. */ 235 extern void *CADDR1, *CADDR2; 236 extern void *msgbufaddr; 237 238 /* for lwp0 uarea initialization after MMU enabled */ 239 extern vaddr_t lwp0uarea; 240 void * pmap_bootstrap2(void); 241 242 void pmap_procwr(struct proc *, vaddr_t, size_t); 243 #define PMAP_NEED_PROCWR 244 245 #ifdef CACHE_HAVE_VAC 246 void pmap_init_vac(size_t); 247 void pmap_prefer(vaddr_t, vaddr_t *); 248 #define PMAP_PREFER(foff, vap, sz, td) pmap_prefer((foff), (vap)) 249 #endif 250 251 void _pmap_set_page_cacheable(struct pmap *, vaddr_t); 252 void _pmap_set_page_cacheinhibit(struct pmap *, vaddr_t); 253 int _pmap_page_is_cacheable(struct pmap *, vaddr_t); 254 255 phys_ram_seg_t *pmap_init_kcore_hdr(cpu_kcore_hdr_t *); 256 257 paddr_t vtophys(vaddr_t va); 258 259 /* Copy definitions from new pmap_68k.h to ease transition. */ 260 #define PMBM_F_VAONLY __BIT(0) 261 #define PMBM_F_KEEPOUT __BIT(1) 262 #define PMBM_F_CI __BIT(2) /* cache-inhibited mapping */ 263 264 #endif /* !_M68K_PMAP_MOTOROLA_H_ */ 265
Indexes created Mon Feb 23 16:20:21 UTC 2026