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      1 /*	$NetBSD: pci_machdep.c,v 1.7 2023/12/20 14:18:37 thorpej Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
      5  * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. All advertising materials mentioning features or use of this software
     16  *    must display the following acknowledgement:
     17  *	This product includes software developed by Charles M. Hannum.
     18  * 4. The name of the author may not be used to endorse or promote products
     19  *    derived from this software without specific prior written permission.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31  */
     32 
     33 /*
     34  * Machine-specific functions for PCI autoconfiguration.
     35  *
     36  * On PCs, there are two methods of generating PCI configuration cycles.
     37  * We try to detect the appropriate mechanism for this machine and set
     38  * up a few function pointers to access the correct method directly.
     39  *
     40  * The configuration method can be hard-coded in the config file by
     41  * using `options PCI_CONF_MODE=N', where `N' is the configuration mode
     42  * as defined section 3.6.4.1, `Generating Configuration Cycles'.
     43  */
     44 
     45 #include <sys/cdefs.h>
     46 __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.7 2023/12/20 14:18:37 thorpej Exp $");
     47 
     48 #include <sys/param.h>
     49 #include <sys/bus.h>
     50 #include <sys/device.h>
     51 #include <sys/errno.h>
     52 #include <sys/extent.h>
     53 #include <sys/intr.h>
     54 #include <sys/queue.h>
     55 #include <sys/systm.h>
     56 #include <sys/time.h>
     57 
     58 #include <uvm/uvm.h>
     59 
     60 #define _POWERPC_BUS_DMA_PRIVATE
     61 
     62 #include <dev/ic/cpc700reg.h>
     63 
     64 #include <machine/pmppc.h>
     65 #include <machine/pio.h>
     66 
     67 #include <dev/pci/pcivar.h>
     68 #include <dev/pci/pcireg.h>
     69 #include <dev/pci/pcidevs.h>
     70 #include <dev/pci/pciconf.h>
     71 
     72 #include <evbppc/pmppc/dev/mainbus.h>
     73 
     74 /*
     75  * Address conversion as seen from a PCI master.
     76  * XXX Shouldn't use 0x80000000, the actual value
     77  * should come from the BAR.
     78  */
     79 #define PHYS_TO_PCI_MEM(x)	((x) + 0x80000000)
     80 #define PCI_MEM_TO_PHYS(x)	((x) - 0x80000000)
     81 
     82 static bus_addr_t phys_to_pci(bus_dma_tag_t, bus_addr_t);
     83 static bus_addr_t pci_to_phys(bus_dma_tag_t, bus_addr_t);
     84 
     85 extern struct powerpc_bus_dma_tag pci_bus_dma_tag;
     86 
     87 void
     88 pmppc_pci_get_chipset_tag(pci_chipset_tag_t pc)
     89 {
     90 	pc->pc_conf_v = (void *)pc;
     91 
     92 	pc->pc_attach_hook = genppc_pci_indirect_attach_hook;
     93 	pc->pc_bus_maxdevs = genppc_pci_bus_maxdevs;
     94 	pc->pc_make_tag = genppc_pci_indirect_make_tag;
     95 	pc->pc_conf_read = genppc_pci_indirect_conf_read;
     96 	pc->pc_conf_write = genppc_pci_indirect_conf_write;
     97 
     98 	pc->pc_intr_v = (void *)pc;
     99 
    100 	pc->pc_intr_map = pmppc_pci_intr_map;
    101 	pc->pc_intr_string = genppc_pci_intr_string;
    102 	pc->pc_intr_evcnt = genppc_pci_intr_evcnt;
    103 	pc->pc_intr_establish = genppc_pci_intr_establish;
    104 	pc->pc_intr_disestablish = genppc_pci_intr_disestablish;
    105 	pc->pc_intr_setattr = genppc_pci_intr_setattr;
    106 	pc->pc_intr_type = genppc_pci_intr_type;
    107 	pc->pc_intr_alloc = genppc_pci_intr_alloc;
    108 	pc->pc_intr_release = genppc_pci_intr_release;
    109 	pc->pc_intx_alloc = genppc_pci_intx_alloc;
    110 
    111 	pc->pc_msi_v = (void *)pc;
    112 	genppc_pci_chipset_msi_init(pc);
    113 
    114 	pc->pc_msix_v = (void *)pc;
    115 	genppc_pci_chipset_msix_init(pc);
    116 
    117 	pc->pc_conf_interrupt = pmppc_pci_conf_interrupt;
    118 	pc->pc_decompose_tag = genppc_pci_indirect_decompose_tag;
    119 	pc->pc_conf_hook = genppc_pci_conf_hook;
    120 
    121 	pc->pc_addr = mapiodev(CPC_PCICFGADR, 4, false);
    122 	pc->pc_data = mapiodev(CPC_PCICFGDATA, 4, false);
    123 	pc->pc_bus = 0;
    124 	pc->pc_node = 0;
    125 	pc->pc_memt = 0;
    126 	pc->pc_iot = 0;
    127 
    128 	/* the following two lines are required because unlike other ports,
    129 	 * we cannot just add PHYS_TO_BUS_MEM/BUS_MEM_TO_PHYS defines to
    130 	 * bus.h, because it would impact other evbppc ports.
    131 	 */
    132 	pci_bus_dma_tag._dma_phys_to_bus_mem = phys_to_pci;
    133 	pci_bus_dma_tag._dma_bus_mem_to_phys = pci_to_phys;
    134 }
    135 
    136 
    137 static bus_addr_t
    138 phys_to_pci(bus_dma_tag_t t, bus_addr_t a)
    139 {
    140 	return PHYS_TO_PCI_MEM(a);
    141 }
    142 
    143 static bus_addr_t pci_to_phys(bus_dma_tag_t t, bus_addr_t a)
    144 {
    145 	return PCI_MEM_TO_PHYS(a);
    146 }
    147 
    148 int
    149 pmppc_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
    150 {
    151 	int	pin = pa->pa_intrpin;
    152 	int	line = pa->pa_intrline;
    153 
    154 	if (pin == 0) {
    155 		/* No IRQ used. */
    156 		goto bad;
    157 	}
    158 
    159 	if (pin > 4) {
    160 		printf("pci_intr_map: bad interrupt pin %d\n", pin);
    161 		goto bad;
    162 	}
    163 
    164 	if (line == 255) {
    165 		printf("pci_intr_map: no mapping for pin %c\n", '@' + pin);
    166 		goto bad;
    167 	}
    168 	/*printf("pci_intr_map pin=%d line=%d\n", pin, line);*/
    169 
    170 	switch (line & 3) {	/* XXX what should this be? */
    171 	case 0: *ihp = PMPPC_I_BPMC_INTA; break;
    172 	case 1: *ihp = PMPPC_I_BPMC_INTB; break;
    173 	case 2: *ihp = PMPPC_I_BPMC_INTC; break;
    174 	case 3: *ihp = PMPPC_I_BPMC_INTD; break;
    175 	}
    176 	return 0;
    177 
    178 bad:
    179 	*ihp = -1;
    180 	return 1;
    181 }
    182 
    183 void
    184 pmppc_pci_conf_interrupt(void *v, int bus, int dev, int pin, int swiz,
    185     int *iline)
    186 {
    187 	int line;
    188 
    189 	line = (swiz + dev) & 3;
    190 	/* XXX UGLY UGLY, figure out the real interrupt mapping */
    191 	if (bus==3&&dev==2&&pin==1&&swiz==3) line=2;
    192 /*
    193 	printf("pci_conf_interrupt: bus=%d dev=%d pin=%d swiz=%d => line=%d\n",
    194 		bus, dev, pin, swiz, line);
    195 */
    196 	*iline = line;
    197 }
    198