| /src/sys/external/bsd/drm2/include/linux/ |
| perf_event.h | 37 struct pmu { struct
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/pmu/ |
| nouveau_nvkm_subdev_pmu_gp10b.c | 32 #include <nvfw/pmu.h>
45 struct nvkm_pmu *pmu = container_of(falcon, typeof(*pmu), falcon); local
57 ret = nvkm_falcon_cmdq_send(pmu->hpq, &cmd.cmd.hdr,
59 &pmu->subdev, msecs_to_jiffies(1000));
91 MODULE_FIRMWARE("nvidia/gp10b/pmu/desc.bin");
92 MODULE_FIRMWARE("nvidia/gp10b/pmu/image.bin");
93 MODULE_FIRMWARE("nvidia/gp10b/pmu/sig.bin");
|
| nouveau_nvkm_subdev_pmu_base.c | 37 struct nvkm_pmu *pmu = device->pmu; local
39 /* Internal PMU FW does not currently control fans in any way,
42 if (pmu && pmu->func->code.size)
45 /* Default (board-loaded, or VBIOS PMU/PREOS) PMU FW on Fermi
53 nvkm_pmu_pgob(struct nvkm_pmu *pmu, bool enable)
55 if (pmu && pmu->func->pgob
62 struct nvkm_pmu *pmu = container_of(work, typeof(*pmu), recv.work); local
78 struct nvkm_pmu *pmu = nvkm_pmu(subdev); local
87 struct nvkm_pmu *pmu = nvkm_pmu(subdev); local
133 struct nvkm_pmu *pmu = nvkm_pmu(subdev); local
140 struct nvkm_pmu *pmu = nvkm_pmu(subdev); local
150 struct nvkm_pmu *pmu = nvkm_pmu(subdev); local
212 struct nvkm_pmu *pmu; local
[all...] |
| nouveau_nvkm_subdev_pmu_gm20b.c | 33 #include <nvfw/pmu.h>
47 struct nvkm_pmu *pmu = container_of(falcon, typeof(*pmu), falcon); local
57 ret = nvkm_falcon_cmdq_send(pmu->hpq, &cmd.cmd.hdr,
59 &pmu->subdev, msecs_to_jiffies(1000));
142 struct nvkm_pmu *pmu = priv; local
143 struct nvkm_subdev *subdev = &pmu->subdev;
152 complete_all(&pmu->wpr_ready);
157 gm20b_pmu_acr_init_wpr(struct nvkm_pmu *pmu)
167 return nvkm_falcon_cmdq_send(pmu->hpq, &cmd.cmd.hdr
[all...] |
| nouveau_nvkm_subdev_pmu_gk20a.c | 56 gk20a_pmu_dvfs_target(struct gk20a_pmu *pmu, int *state)
58 struct nvkm_clk *clk = pmu->base.subdev.device->clk;
64 gk20a_pmu_dvfs_get_cur_state(struct gk20a_pmu *pmu, int *state)
66 struct nvkm_clk *clk = pmu->base.subdev.device->clk;
72 gk20a_pmu_dvfs_get_target_state(struct gk20a_pmu *pmu,
75 struct gk20a_pmu_dvfs_data *data = pmu->data;
76 struct nvkm_clk *clk = pmu->base.subdev.device->clk;
91 nvkm_trace(&pmu->base.subdev, "cur level = %d, new level = %d\n",
100 gk20a_pmu_dvfs_get_dev_status(struct gk20a_pmu *pmu,
103 struct nvkm_falcon *falcon = &pmu->base.falcon
121 struct gk20a_pmu *pmu = local
220 struct gk20a_pmu *pmu; local
[all...] |
| nouveau_nvkm_subdev_pmu_memx.c | 12 struct nvkm_pmu *pmu; member in struct:nvkm_memx
25 struct nvkm_device *device = memx->pmu->subdev.device;
49 nvkm_memx_init(struct nvkm_pmu *pmu, struct nvkm_memx **pmemx)
51 struct nvkm_device *device = pmu->subdev.device;
56 ret = nvkm_pmu_send(pmu, reply, PROC_MEMX, MEMX_MSG_INFO,
64 memx->pmu = pmu;
80 struct nvkm_pmu *pmu = memx->pmu; local
81 struct nvkm_subdev *subdev = &pmu->subdev
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_pmu.c | 39 /* record to keep track of pmu entry per pmu type per device */
43 struct pmu pmu; member in struct:amdgpu_pmu_entry
55 /* test the event attr type check for PMU enumeration */
56 if (event->attr.type != event->pmu->type)
69 struct amdgpu_pmu_entry *pe = container_of(event->pmu,
71 pmu);
98 struct amdgpu_pmu_entry *pe = container_of(event->pmu,
100 pmu);
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/devinit/ |
| nouveau_nvkm_subdev_devinit_gm200.c | 33 #include <subdev/bios/pmu.h>
37 pmu_code(struct nv50_devinit *init, u32 pmu, u32 img, u32 len, bool sec)
43 nvkm_wr32(device, 0x10a180, 0x01000000 | (sec ? 0x10000000 : 0) | pmu);
46 nvkm_wr32(device, 0x10a188, (pmu + i) >> 8);
57 pmu_data(struct nv50_devinit *init, u32 pmu, u32 img, u32 len)
63 nvkm_wr32(device, 0x10a1c0, 0x01000000 | pmu);
92 struct nvbios_pmuR pmu; local
94 if (!nvbios_pmuRm(bios, type, &pmu))
100 pmu_code(init, pmu.boot_addr_pmu, pmu.boot_addr, pmu.boot_size, false)
148 u32 pmu = pmu_args(init, args + 0x08, 0x08); local
156 u32 pmu = pmu_args(init, args + 0x08, 0x10); local
[all...] |
| /src/sys/arch/sparc64/dev/ |
| pckbc_ebus.c | 191 int pmu = 0; local
196 pmu = node;
201 if (pmu != 0) {
207 aprint_error(": unable to map PMU cmd register\n");
212 aprint_error(": unable to map PMU data register\n");
|
| /src/sys/external/mit/xen-include-public/dist/xen/include/public/ |
| pmu.h | 28 #include "arch-x86/pmu.h"
42 * @cmd == XENPMU_* (PMU operation)
46 #define XENPMU_mode_get 0 /* Also used for getting PMU version */
72 /* PMU modes:
73 * - XENPMU_MODE_OFF: No PMU virtualization
86 * PMU features:
102 * Shared PMU data between hypervisor and PV(H) domains.
104 * The hypervisor fills out this structure during PMU interrupt and sends an
108 * by both the hypervisor and the guest (see arch-$arch/pmu.h).
130 struct xen_pmu_arch pmu; member in struct:xen_pmu_data
[all...] |
| /src/sys/arch/arm/marvell/ |
| dove.c | 112 "AC97(32)", "PMU(33)", "CAM(34)", "SD0(35)",
163 * And clks, PMU.
331 struct dove_pmu_softc *pmu = local
334 if (pmu == NULL)
345 val = READ_PMUREG(pmu, DOVE_PMU_CGCR);
435 printf("dove pmu intr: cause 0x%x, mask 0x%x\n", cause, mask);
515 * 3. Enable the <DFSDone> field in the PMU Interrupts Mask Register
522 * 4. Set the <MaskFIQ> and <MaskIRQ> field in the PMU Control Register.
523 * The PMU masks the main interrupt pins of the Interrupt Controller
|
| /src/sys/external/bsd/drm2/dist/drm/i915/ |
| i915_pmu.c | 87 static bool pmu_needs_timer(struct i915_pmu *pmu, bool gpu_active)
89 struct drm_i915_private *i915 = container_of(pmu, typeof(*i915), pmu);
97 enable = pmu->enable;
155 struct i915_pmu *pmu = &i915->pmu; local
166 spin_lock_irqsave(&pmu->lock, flags);
169 pmu->sample[__I915_SAMPLE_RC6].cur = val;
178 val = ktime_since(pmu->sleep_last);
179 val += pmu->sample[__I915_SAMPLE_RC6].cur
194 struct i915_pmu *pmu = &i915->pmu; local
226 struct i915_pmu *pmu = &i915->pmu; local
246 struct i915_pmu *pmu = &i915->pmu; local
291 struct intel_engine_pmu *pmu = &engine->pmu; local
360 struct i915_pmu *pmu = &i915->pmu; local
405 struct i915_pmu *pmu = &i915->pmu; local
581 struct i915_pmu *pmu = &i915->pmu; local
644 struct i915_pmu *pmu = &i915->pmu; local
715 struct i915_pmu *pmu = &i915->pmu; local
1050 struct i915_pmu *pmu = hlist_entry_safe(node, typeof(*pmu), node); local
1063 struct i915_pmu *pmu = hlist_entry_safe(node, typeof(*pmu), node); local
1125 struct i915_pmu *pmu = &i915->pmu; local
1189 struct i915_pmu *pmu = &i915->pmu; local
[all...] |
| i915_drv.h | 1310 struct i915_pmu pmu; member in struct:drm_i915_private
|
| /src/sys/external/bsd/drm2/dist/drm/i915/gt/ |
| intel_engine_types.h | 395 } pmu; member in struct:intel_engine_cs
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/core/ |
| device.h | 164 struct nvkm_pmu *pmu; member in struct:nvkm_device
241 int (*pmu )(struct nvkm_device *, int idx, struct nvkm_pmu **); member in struct:nvkm_device_chip
|
| /src/sys/dev/ic/ |
| bwfm.c | 1166 struct bwfm_core *cc, *pmu; local
1171 pmu = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_PMU);
1172 if (pmu)
1173 return pmu;
|
