intel_display.c | 255 return pipe_config->port_clock; /* SPLL */ 1045 crtc_state->port_clock, refclk, 8277 if (pipe_config->port_clock == 162000 || 8858 !i9xx_find_best_dpll(limit, crtc_state, crtc_state->port_clock, 8900 !g4x_find_best_dpll(limit, crtc_state, crtc_state->port_clock, 8934 !pnv_find_best_dpll(limit, crtc_state, crtc_state->port_clock, 8968 !i9xx_find_best_dpll(limit, crtc_state, crtc_state->port_clock, 8989 !chv_find_best_dpll(limit, crtc_state, crtc_state->port_clock, 9010 !vlv_find_best_dpll(limit, crtc_state, crtc_state->port_clock, 9080 pipe_config->port_clock = vlv_calc_dpll_params(refclk, &clock) 11900 int port_clock; local in function:i9xx_crtc_clock_get [all...] |