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      1 /*	$NetBSD: dchubbub.h,v 1.2 2021/12/18 23:45:05 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright 2012-15 Advanced Micro Devices, Inc.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the "Software"),
      8  * to deal in the Software without restriction, including without limitation
      9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  * and/or sell copies of the Software, and to permit persons to whom the
     11  * Software is furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice shall be included in
     14  * all copies or substantial portions of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22  * OTHER DEALINGS IN THE SOFTWARE.
     23  *
     24  * Authors: AMD
     25  *
     26  */
     27 
     28 #ifndef __DAL_DCHUBBUB_H__
     29 #define __DAL_DCHUBBUB_H__
     30 
     31 
     32 enum dcc_control {
     33 	dcc_control__256_256_xxx,
     34 	dcc_control__128_128_xxx,
     35 	dcc_control__256_64_64,
     36 };
     37 
     38 enum segment_order {
     39 	segment_order__na,
     40 	segment_order__contiguous,
     41 	segment_order__non_contiguous,
     42 };
     43 
     44 struct dcn_hubbub_wm_set {
     45 	uint32_t wm_set;
     46 	uint32_t data_urgent;
     47 	uint32_t pte_meta_urgent;
     48 	uint32_t sr_enter;
     49 	uint32_t sr_exit;
     50 	uint32_t dram_clk_chanage;
     51 };
     52 
     53 struct dcn_hubbub_wm {
     54 	struct dcn_hubbub_wm_set sets[4];
     55 };
     56 
     57 enum dcn_hubbub_page_table_depth {
     58 	DCN_PAGE_TABLE_DEPTH_1_LEVEL,
     59 	DCN_PAGE_TABLE_DEPTH_2_LEVEL,
     60 	DCN_PAGE_TABLE_DEPTH_3_LEVEL,
     61 	DCN_PAGE_TABLE_DEPTH_4_LEVEL
     62 };
     63 
     64 enum dcn_hubbub_page_table_block_size {
     65 	DCN_PAGE_TABLE_BLOCK_SIZE_4KB = 0,
     66 	DCN_PAGE_TABLE_BLOCK_SIZE_64KB = 4,
     67 };
     68 
     69 struct dcn_hubbub_phys_addr_config {
     70 	struct {
     71 		uint64_t fb_top;
     72 		uint64_t fb_offset;
     73 		uint64_t fb_base;
     74 		uint64_t agp_top;
     75 		uint64_t agp_bot;
     76 		uint64_t agp_base;
     77 	} system_aperture;
     78 
     79 	struct {
     80 		uint64_t page_table_start_addr;
     81 		uint64_t page_table_end_addr;
     82 		uint64_t page_table_base_addr;
     83 	} gart_config;
     84 
     85 	uint64_t page_table_default_page_addr;
     86 };
     87 
     88 struct dcn_hubbub_virt_addr_config {
     89 	uint64_t				page_table_start_addr;
     90 	uint64_t				page_table_end_addr;
     91 	enum dcn_hubbub_page_table_block_size	page_table_block_size;
     92 	enum dcn_hubbub_page_table_depth	page_table_depth;
     93 	uint64_t				page_table_base_addr;
     94 };
     95 
     96 struct hubbub_addr_config {
     97 	struct dcn_hubbub_phys_addr_config pa_config;
     98 	struct dcn_hubbub_virt_addr_config va_config;
     99 	struct {
    100 		uint64_t aperture_check_fault;
    101 		uint64_t generic_fault;
    102 	} default_addrs;
    103 };
    104 
    105 struct hubbub_funcs {
    106 	void (*update_dchub)(
    107 			struct hubbub *hubbub,
    108 			struct dchub_init_data *dh_data);
    109 
    110 	int (*init_dchub_sys_ctx)(
    111 			struct hubbub *hubbub,
    112 			struct dcn_hubbub_phys_addr_config *pa_config);
    113 	void (*init_vm_ctx)(
    114 			struct hubbub *hubbub,
    115 			struct dcn_hubbub_virt_addr_config *va_config,
    116 			int vmid);
    117 
    118 	bool (*get_dcc_compression_cap)(struct hubbub *hubbub,
    119 			const struct dc_dcc_surface_param *input,
    120 			struct dc_surface_dcc_cap *output);
    121 
    122 	bool (*dcc_support_swizzle)(
    123 			enum swizzle_mode_values swizzle,
    124 			unsigned int bytes_per_element,
    125 			enum segment_order *segment_order_horz,
    126 			enum segment_order *segment_order_vert);
    127 
    128 	bool (*dcc_support_pixel_format)(
    129 			enum surface_pixel_format format,
    130 			unsigned int *bytes_per_element);
    131 
    132 	void (*wm_read_state)(struct hubbub *hubbub,
    133 			struct dcn_hubbub_wm *wm);
    134 
    135 	void (*get_dchub_ref_freq)(struct hubbub *hubbub,
    136 			unsigned int dccg_ref_freq_inKhz,
    137 			unsigned int *dchub_ref_freq_inKhz);
    138 
    139 	void (*program_watermarks)(
    140 			struct hubbub *hubbub,
    141 			struct dcn_watermark_set *watermarks,
    142 			unsigned int refclk_mhz,
    143 			bool safe_to_lower);
    144 
    145 	bool (*is_allow_self_refresh_enabled)(struct hubbub *hubbub);
    146 	void (*allow_self_refresh_control)(struct hubbub *hubbub, bool allow);
    147 
    148 	void (*apply_DEDCN21_147_wa)(struct hubbub *hubbub);
    149 };
    150 
    151 struct hubbub {
    152 	const struct hubbub_funcs *funcs;
    153 	struct dc_context *ctx;
    154 };
    155 
    156 #endif
    157