1 /* $NetBSD: psycho.c,v 1.138 2024/09/08 09:36:49 rillig Exp $ */ 2 3 /* 4 * Copyright (c) 1999, 2000 Matthew R. Green 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 /* 30 * Copyright (c) 2001, 2002 Eduardo E. Horvath 31 * All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 3. The name of the author may not be used to endorse or promote products 42 * derived from this software without specific prior written permission. 43 * 44 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 45 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 46 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 47 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 48 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 49 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 50 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 51 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 52 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 53 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 54 * SUCH DAMAGE. 55 */ 56 57 #include <sys/cdefs.h> 58 __KERNEL_RCSID(0, "$NetBSD: psycho.c,v 1.138 2024/09/08 09:36:49 rillig Exp $"); 59 60 #include "opt_ddb.h" 61 62 /* 63 * Support for `psycho' and `psycho+' UPA to PCI bridge and 64 * UltraSPARC IIi and IIe `sabre' PCI controllers. 65 */ 66 67 #ifdef DEBUG 68 #define PDB_PROM 0x01 69 #define PDB_BUSMAP 0x02 70 #define PDB_INTR 0x04 71 #define PDB_INTMAP 0x08 72 #define PDB_CONF 0x10 73 #define PDB_STICK 0x20 74 int psycho_debug = 0x0; 75 #define DPRINTF(l, s) do { if (psycho_debug & l) printf s; } while (0) 76 #else 77 #define DPRINTF(l, s) 78 #endif 79 80 #include <sys/param.h> 81 #include <sys/device.h> 82 #include <sys/errno.h> 83 #include <sys/extent.h> 84 #include <sys/malloc.h> 85 #include <sys/kmem.h> 86 #include <sys/systm.h> 87 #include <sys/time.h> 88 #include <sys/reboot.h> 89 90 #include <uvm/uvm.h> 91 92 #define _SPARC_BUS_DMA_PRIVATE 93 #include <sys/bus.h> 94 #include <machine/autoconf.h> 95 #include <machine/psl.h> 96 97 #include <dev/pci/pcivar.h> 98 #include <dev/pci/pcireg.h> 99 #include <dev/sysmon/sysmon_taskq.h> 100 101 #include <sparc64/dev/iommureg.h> 102 #include <sparc64/dev/iommuvar.h> 103 #include <sparc64/dev/psychoreg.h> 104 #include <sparc64/dev/psychovar.h> 105 106 #include "ioconf.h" 107 108 static pci_chipset_tag_t psycho_alloc_chipset(struct psycho_pbm *, int, 109 pci_chipset_tag_t); 110 static struct extent *psycho_alloc_extent(struct psycho_pbm *, int, int, 111 const char *); 112 static void psycho_get_bus_range(int, int *); 113 static void psycho_fixup_bus_range(int, int *); 114 static void psycho_get_ranges(int, struct psycho_ranges **, int *); 115 static void psycho_set_intr(struct psycho_softc *, int, void *, uint64_t *, 116 uint64_t *); 117 118 /* chipset handlers */ 119 static pcireg_t psycho_pci_conf_read(pci_chipset_tag_t, pcitag_t, int); 120 static void psycho_pci_conf_write(pci_chipset_tag_t, pcitag_t, int, 121 pcireg_t); 122 static void *psycho_pci_intr_establish(pci_chipset_tag_t, 123 pci_intr_handle_t, 124 int, int (*)(void *), void *); 125 static int psycho_pci_find_ino(const struct pci_attach_args *, 126 pci_intr_handle_t *); 127 128 /* Interrupt handlers */ 129 static int psycho_ue(void *); 130 static int psycho_ce(void *); 131 static int psycho_bus_a(void *); 132 static int psycho_bus_b(void *); 133 static int psycho_powerfail(void *); 134 static int psycho_wakeup(void *); 135 136 137 /* IOMMU support */ 138 static void psycho_iommu_init(struct psycho_softc *, int); 139 140 /* 141 * bus space and bus DMA support for UltraSPARC `psycho'. note that most 142 * of the bus DMA support is provided by the iommu dvma controller. 143 */ 144 static struct psycho_ranges *get_psychorange(struct psycho_pbm *, int); 145 146 static paddr_t psycho_bus_mmap(bus_space_tag_t, bus_addr_t, off_t, int, int); 147 static int _psycho_bus_map(bus_space_tag_t, bus_addr_t, bus_size_t, int, 148 vaddr_t, bus_space_handle_t *); 149 static void *psycho_intr_establish(bus_space_tag_t, int, int, int (*)(void *), 150 void *, void(*)(void)); 151 152 static int psycho_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t, 153 bus_size_t, int, bus_dmamap_t *); 154 static void psycho_sabre_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 155 bus_size_t, int); 156 157 /* base pci_chipset */ 158 extern struct sparc_pci_chipset _sparc_pci_chipset; 159 160 /* power button handlers */ 161 static void psycho_register_power_button(struct psycho_softc *sc); 162 static void psycho_power_button_pressed(void *arg); 163 164 /* 165 * autoconfiguration 166 */ 167 static int psycho_match(device_t, cfdata_t, void *); 168 static void psycho_attach(device_t, device_t, void *); 169 static int psycho_print(void *aux, const char *p); 170 171 CFATTACH_DECL_NEW(psycho, sizeof(struct psycho_softc), 172 psycho_match, psycho_attach, NULL, NULL); 173 174 /* 175 * "sabre" is the UltraSPARC IIi onboard UPA to PCI bridge. It manages a 176 * single PCI bus and does not have a streaming buffer. It often has an APB 177 * (advanced PCI bridge) connected to it, which was designed specifically for 178 * the IIi. The APB lets the IIi handle two independent PCI buses, and 179 * appears as two "simba"'s underneath the sabre. 180 * 181 * "psycho" and "psycho+" is a dual UPA to PCI bridge. It sits on the UPA bus 182 * and manages two PCI buses. "psycho" has two 64-bit 33 MHz buses, while 183 * "psycho+" controls both a 64-bit 33 MHz and a 64-bit 66 MHz PCI bus. You 184 * will usually find a "psycho+" since I don't think the original "psycho" 185 * ever shipped, and if it did it would be in the U30. 186 * 187 * Each "psycho" PCI bus appears as a separate OFW node, but since they are 188 * both part of the same IC, they only have a single register space. As such, 189 * they need to be configured together, even though the autoconfiguration will 190 * attach them separately. 191 * 192 * On UltraIIi machines, "sabre" itself usually takes pci0, with "simba" often 193 * as pci1 and pci2, although they have been implemented with other PCI bus 194 * numbers on some machines. 195 * 196 * On UltraII machines, there can be any number of "psycho+" ICs, each 197 * providing two PCI buses. 198 * 199 * 200 * XXXX The psycho/sabre node has an `interrupts' attribute. They contain 201 * the values of the following interrupts in this order: 202 * 203 * PCI Bus Error (30) 204 * DMA UE (2e) 205 * DMA CE (2f) 206 * Power Fail (25) 207 * 208 * We really should attach handlers for each. 209 * 210 */ 211 212 #define ROM_PCI_NAME "pci" 213 214 struct psycho_names { 215 const char *p_name; 216 int p_type; 217 } psycho_names[] = { 218 { "SUNW,psycho", PSYCHO_MODE_PSYCHO }, 219 { "pci108e,8000", PSYCHO_MODE_PSYCHO }, 220 { "SUNW,sabre", PSYCHO_MODE_SABRE }, 221 { "pci108e,a000", PSYCHO_MODE_SABRE }, 222 { "pci108e,a001", PSYCHO_MODE_SABRE }, 223 { NULL, 0 } 224 }; 225 226 struct psycho_softc *psycho0 = NULL; 227 228 static int 229 psycho_match(device_t parent, cfdata_t match, void *aux) 230 { 231 struct mainbus_attach_args *ma = aux; 232 char *model; 233 int i; 234 235 if (ma->ma_node == 0) 236 return 0; /* no OF node, can't be us */ 237 238 model = prom_getpropstring(ma->ma_node, "model"); 239 /* match on a name of "pci" and a sabre or a psycho */ 240 if (strcmp(ma->ma_name, ROM_PCI_NAME) == 0) { 241 for (i=0; psycho_names[i].p_name; i++) 242 if (strcmp(model, psycho_names[i].p_name) == 0) 243 return (1); 244 245 model = prom_getpropstring(ma->ma_node, "compatible"); 246 for (i=0; psycho_names[i].p_name; i++) 247 if (strcmp(model, psycho_names[i].p_name) == 0) 248 return (1); 249 } 250 return (0); 251 } 252 253 #ifdef DEBUG 254 static void psycho_dump_intmap(struct psycho_softc *sc); 255 static void 256 psycho_dump_intmap(struct psycho_softc *sc) 257 { 258 volatile uint64_t *intrmapptr = NULL; 259 260 printf("psycho_dump_intmap: OBIO\n"); 261 262 for (intrmapptr = &sc->sc_regs->scsi_int_map; 263 intrmapptr < &sc->sc_regs->ue_int_map; 264 intrmapptr++) 265 printf("%p: %llx\n", intrmapptr, 266 (unsigned long long)*intrmapptr); 267 268 printf("\tintmap:pci\n"); 269 for (intrmapptr = &sc->sc_regs->pcia_slot0_int; 270 intrmapptr <= &sc->sc_regs->pcib_slot3_int; 271 intrmapptr++) 272 printf("%p: %llx\n", intrmapptr, 273 (unsigned long long)*intrmapptr); 274 275 printf("\tintmap:ffb\n"); 276 for (intrmapptr = &sc->sc_regs->ffb0_int_map; 277 intrmapptr <= &sc->sc_regs->ffb1_int_map; 278 intrmapptr++) 279 printf("%p: %llx\n", intrmapptr, 280 (unsigned long long)*intrmapptr); 281 } 282 #endif 283 284 /* 285 * SUNW,psycho initialisation .. 286 * - find the per-psycho registers 287 * - figure out the IGN. 288 * - find our partner psycho 289 * - configure ourselves 290 * - bus range, bus, 291 * - get interrupt-map and interrupt-map-mask 292 * - setup the chipsets. 293 * - if we're the first of the pair, initialise the IOMMU, otherwise 294 * just copy its tags and addresses. 295 */ 296 static void 297 psycho_attach(device_t parent, device_t self, void *aux) 298 { 299 struct psycho_softc *sc = device_private(self); 300 struct psycho_softc *osc = NULL; 301 struct psycho_pbm *pp; 302 struct pcibus_attach_args pba; 303 struct mainbus_attach_args *ma = aux; 304 struct psycho_ranges *pr; 305 prop_dictionary_t dict; 306 bus_space_handle_t bh; 307 uint64_t csr, mem_base; 308 int psycho_br[2], n, i; 309 bus_space_handle_t pci_ctl; 310 char *model = prom_getpropstring(ma->ma_node, "model"); 311 312 aprint_normal("\n"); 313 314 sc->sc_dev = self; 315 sc->sc_node = ma->ma_node; 316 sc->sc_bustag = ma->ma_bustag; 317 sc->sc_dmatag = ma->ma_dmatag; 318 sc->sc_last_stick = 0; 319 320 if (psycho0 == NULL) 321 psycho0 = sc; 322 DPRINTF(PDB_STICK, ("init psycho0 %lx\n", (long)sc)); 323 /* 324 * Identify the device. 325 */ 326 for (i=0; psycho_names[i].p_name; i++) 327 if (strcmp(model, psycho_names[i].p_name) == 0) { 328 sc->sc_mode = psycho_names[i].p_type; 329 goto found; 330 } 331 332 model = prom_getpropstring(ma->ma_node, "compatible"); 333 for (i=0; psycho_names[i].p_name; i++) 334 if (strcmp(model, psycho_names[i].p_name) == 0) { 335 sc->sc_mode = psycho_names[i].p_type; 336 goto found; 337 } 338 339 panic("unknown psycho model %s", model); 340 found: 341 342 /* 343 * The psycho gets three register banks: 344 * (0) per-PBM configuration and status registers 345 * (1) per-PBM PCI configuration space, containing only the 346 * PBM 256-byte PCI header 347 * (2) the shared psycho configuration registers (struct psychoreg) 348 */ 349 350 /* Register layouts are different. stuupid. */ 351 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) { 352 sc->sc_basepaddr = (paddr_t)ma->ma_reg[2].ur_paddr; 353 354 if (ma->ma_naddress > 2) { 355 sparc_promaddr_to_handle(sc->sc_bustag, 356 ma->ma_address[2], &sc->sc_bh); 357 sparc_promaddr_to_handle(sc->sc_bustag, 358 ma->ma_address[0], &pci_ctl); 359 360 sc->sc_regs = (struct psychoreg *) 361 bus_space_vaddr(sc->sc_bustag, sc->sc_bh); 362 } else if (ma->ma_nreg > 2) { 363 364 /* We need to map this in ourselves. */ 365 if (bus_space_map(sc->sc_bustag, 366 ma->ma_reg[2].ur_paddr, 367 ma->ma_reg[2].ur_len, BUS_SPACE_MAP_LINEAR, 368 &sc->sc_bh)) 369 panic("psycho_attach: cannot map regs"); 370 sc->sc_regs = (struct psychoreg *) 371 bus_space_vaddr(sc->sc_bustag, sc->sc_bh); 372 373 if (bus_space_map(sc->sc_bustag, 374 ma->ma_reg[0].ur_paddr, 375 ma->ma_reg[0].ur_len, BUS_SPACE_MAP_LINEAR, 376 &pci_ctl)) 377 panic("psycho_attach: cannot map ctl"); 378 } else 379 panic("psycho_attach: %d not enough registers", 380 ma->ma_nreg); 381 382 } else { 383 sc->sc_basepaddr = (paddr_t)ma->ma_reg[0].ur_paddr; 384 385 if (ma->ma_naddress) { 386 sparc_promaddr_to_handle(sc->sc_bustag, 387 ma->ma_address[0], &sc->sc_bh); 388 sc->sc_regs = (struct psychoreg *) 389 bus_space_vaddr(sc->sc_bustag, sc->sc_bh); 390 391 bus_space_subregion(sc->sc_bustag, sc->sc_bh, 392 offsetof(struct psychoreg, psy_pcictl), 393 sizeof(struct pci_ctl), &pci_ctl); 394 } else if (ma->ma_nreg) { 395 396 /* We need to map this in ourselves. */ 397 if (bus_space_map(sc->sc_bustag, 398 ma->ma_reg[0].ur_paddr, 399 ma->ma_reg[0].ur_len, BUS_SPACE_MAP_LINEAR, 400 &sc->sc_bh)) 401 panic("psycho_attach: cannot map regs"); 402 sc->sc_regs = (struct psychoreg *) 403 bus_space_vaddr(sc->sc_bustag, sc->sc_bh); 404 405 bus_space_subregion(sc->sc_bustag, sc->sc_bh, 406 offsetof(struct psychoreg, psy_pcictl), 407 sizeof(struct pci_ctl), &pci_ctl); 408 } else 409 panic("psycho_attach: %d not enough registers", 410 ma->ma_nreg); 411 } 412 413 csr = bus_space_read_8(sc->sc_bustag, sc->sc_bh, 414 offsetof(struct psychoreg, psy_csr)); 415 sc->sc_ign = 0x7c0; /* APB IGN is always 0x7c */ 416 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) 417 sc->sc_ign = PSYCHO_GCSR_IGN(csr) << 6; 418 419 aprint_normal_dev(self, "%s: impl %d, version %d: ign %x ", 420 model, PSYCHO_GCSR_IMPL(csr), PSYCHO_GCSR_VERS(csr), 421 sc->sc_ign); 422 /* 423 * Match other psycho's that are already configured against 424 * the base physical address. This will be the same for a 425 * pair of devices that share register space. 426 */ 427 for (n = 0; n < psycho_cd.cd_ndevs; n++) { 428 429 struct psycho_softc *asc = device_lookup_private(&psycho_cd, n); 430 431 if (asc == NULL || asc == sc) 432 /* This entry is not there or it is me */ 433 continue; 434 435 if (asc->sc_basepaddr != sc->sc_basepaddr) 436 /* This is an unrelated psycho */ 437 continue; 438 439 /* Found partner */ 440 osc = asc; 441 break; 442 } 443 444 445 /* Oh, dear. OK, lets get started */ 446 447 /* 448 * Setup the PCI control register 449 */ 450 csr = bus_space_read_8(sc->sc_bustag, pci_ctl, 451 offsetof(struct pci_ctl, pci_csr)); 452 csr |= PCICTL_MRLM | 453 PCICTL_ARB_PARK | 454 PCICTL_ERRINTEN | 455 PCICTL_4ENABLE; 456 csr &= ~(PCICTL_SERR | 457 PCICTL_CPU_PRIO | 458 PCICTL_ARB_PRIO | 459 PCICTL_RTRYWAIT); 460 bus_space_write_8(sc->sc_bustag, pci_ctl, 461 offsetof(struct pci_ctl, pci_csr), csr); 462 463 464 /* 465 * Allocate our psycho_pbm 466 */ 467 pp = sc->sc_psycho_this = kmem_zalloc(sizeof *pp, KM_SLEEP); 468 pp->pp_sc = sc; 469 470 /* grab the psycho ranges */ 471 psycho_get_ranges(sc->sc_node, &pp->pp_range, &pp->pp_nrange); 472 473 /* get the bus-range for the psycho */ 474 psycho_get_bus_range(sc->sc_node, psycho_br); 475 476 pba.pba_bus = psycho_br[0]; 477 pba.pba_bridgetag = NULL; 478 479 /* Fix up invalid 0x00-0xff bus-range, as found on SPARCle */ 480 if (psycho_br[0] == 0 && psycho_br[1] == 0xff) 481 psycho_fixup_bus_range(sc->sc_node, psycho_br); 482 483 aprint_normal("bus range %u to %u", psycho_br[0], psycho_br[1]); 484 aprint_normal("; PCI bus %d", psycho_br[0]); 485 486 pp->pp_pcictl = pci_ctl; 487 488 /* allocate our tags */ 489 pp->pp_memt = psycho_alloc_mem_tag(pp); 490 pp->pp_iot = psycho_alloc_io_tag(pp); 491 pp->pp_dmat = psycho_alloc_dma_tag(pp); 492 pp->pp_flags = (pp->pp_memt ? PCI_FLAGS_MEM_OKAY : 0) | 493 (pp->pp_iot ? PCI_FLAGS_IO_OKAY : 0); 494 495 /* allocate a chipset for this */ 496 pp->pp_pc = psycho_alloc_chipset(pp, sc->sc_node, &_sparc_pci_chipset); 497 pp->pp_pc->spc_busmax = psycho_br[1]; 498 499 switch((ma->ma_reg[0].ur_paddr) & 0xf000) { 500 case 0x2000: 501 pp->pp_id = PSYCHO_PBM_A; 502 break; 503 case 0x4000: 504 pp->pp_id = PSYCHO_PBM_B; 505 break; 506 } 507 508 aprint_normal("\n"); 509 510 /* allocate extents for free bus space */ 511 pp->pp_exmem = psycho_alloc_extent(pp, sc->sc_node, 0x02, "psycho mem"); 512 pp->pp_exio = psycho_alloc_extent(pp, sc->sc_node, 0x01, "psycho io"); 513 514 #ifdef DEBUG 515 if (psycho_debug & PDB_INTR) 516 psycho_dump_intmap(sc); 517 #endif 518 519 /* 520 * And finally, if we're a sabre or the first of a pair of psycho's to 521 * arrive here, start up the IOMMU and get a config space tag. 522 */ 523 if (osc == NULL) { 524 uint64_t timeo; 525 526 /* 527 * Establish handlers for interesting interrupts.... 528 * 529 * XXX We need to remember these and remove this to support 530 * hotplug on the UPA/FHC bus. 531 * 532 * XXX Not all controllers have these, but installing them 533 * is better than trying to sort through this mess. 534 */ 535 psycho_set_intr(sc, 15, psycho_ue, 536 &sc->sc_regs->ue_int_map, 537 &sc->sc_regs->ue_clr_int); 538 psycho_set_intr(sc, 1, psycho_ce, 539 &sc->sc_regs->ce_int_map, 540 &sc->sc_regs->ce_clr_int); 541 psycho_set_intr(sc, 15, psycho_bus_a, 542 &sc->sc_regs->pciaerr_int_map, 543 &sc->sc_regs->pciaerr_clr_int); 544 /* 545 * Netra X1 may hang when the powerfail interrupt is enabled. 546 */ 547 if (strcmp(machine_model, "SUNW,UltraAX-i2") != 0) { 548 psycho_set_intr(sc, 15, psycho_powerfail, 549 &sc->sc_regs->power_int_map, 550 &sc->sc_regs->power_clr_int); 551 psycho_register_power_button(sc); 552 } 553 if (sc->sc_mode != PSYCHO_MODE_SABRE) { 554 /* sabre doesn't have these interrupts */ 555 psycho_set_intr(sc, 15, psycho_bus_b, 556 &sc->sc_regs->pciberr_int_map, 557 &sc->sc_regs->pciberr_clr_int); 558 psycho_set_intr(sc, 1, psycho_wakeup, 559 &sc->sc_regs->pwrmgt_int_map, 560 &sc->sc_regs->pwrmgt_clr_int); 561 } 562 563 /* 564 * Apparently a number of machines with psycho and psycho+ 565 * controllers have interrupt latency issues. We'll try 566 * setting the interrupt retry timeout to 0xff which gives us 567 * a retry of 3-6 usec (which is what sysio is set to) for the 568 * moment, which seems to help alleviate this problem. 569 */ 570 timeo = sc->sc_regs->intr_retry_timer; 571 if (timeo > 0xfff) { 572 #ifdef DEBUG 573 printf("decreasing interrupt retry timeout " 574 "from %lx to 0xff\n", (long)timeo); 575 #endif 576 sc->sc_regs->intr_retry_timer = 0xff; 577 } 578 579 /* 580 * Allocate bus node, this contains a prom node per bus. 581 */ 582 pp->pp_pc->spc_busnode = 583 kmem_zalloc(sizeof(*pp->pp_pc->spc_busnode), KM_SLEEP); 584 585 /* 586 * Setup IOMMU and PCI configuration if we're the first 587 * of a pair of psycho's to arrive here. 588 * 589 * We should calculate a TSB size based on amount of RAM 590 * and number of bus controllers and number and type of 591 * child devices. 592 * 593 * For the moment, 32KB should be more than enough. 594 */ 595 sc->sc_is = kmem_alloc(sizeof(struct iommu_state), KM_SLEEP); 596 597 /* Point the strbuf_ctl at the iommu_state */ 598 pp->pp_sb.sb_is = sc->sc_is; 599 600 sc->sc_is->is_sb[0] = sc->sc_is->is_sb[1] = NULL; 601 if (prom_getproplen(sc->sc_node, "no-streaming-cache") < 0) { 602 struct strbuf_ctl *sb = &pp->pp_sb; 603 vaddr_t va = (vaddr_t)&pp->pp_flush[0x40]; 604 605 /* 606 * Initialize the strbuf_ctl. 607 * 608 * The flush sync buffer must be 64-byte aligned. 609 */ 610 sb->sb_flush = (void *)(va & ~0x3f); 611 612 bus_space_subregion(sc->sc_bustag, pci_ctl, 613 offsetof(struct pci_ctl, pci_strbuf), 614 sizeof (struct iommu_strbuf), &sb->sb_sb); 615 616 /* Point our iommu at the strbuf_ctl */ 617 sc->sc_is->is_sb[0] = sb; 618 } 619 620 psycho_iommu_init(sc, 2); 621 622 sc->sc_configtag = psycho_alloc_config_tag(sc->sc_psycho_this); 623 624 /* 625 * XXX This is a really ugly hack because PCI config space 626 * is explicitly handled with unmapped accesses. 627 */ 628 i = sc->sc_bustag->type; 629 sc->sc_bustag->type = PCI_CONFIG_BUS_SPACE; 630 if (bus_space_map(sc->sc_bustag, sc->sc_basepaddr + 0x01000000, 631 0x01000000, 0, &bh)) 632 panic("could not map psycho PCI configuration space"); 633 sc->sc_bustag->type = i; 634 sc->sc_configaddr = bh; 635 } else { 636 /* Share bus numbers with the pair of mine */ 637 pp->pp_pc->spc_busnode = 638 osc->sc_psycho_this->pp_pc->spc_busnode; 639 640 /* Just copy IOMMU state, config tag and address */ 641 sc->sc_is = osc->sc_is; 642 sc->sc_configtag = osc->sc_configtag; 643 sc->sc_configaddr = osc->sc_configaddr; 644 645 /* Point the strbuf_ctl at the iommu_state */ 646 pp->pp_sb.sb_is = sc->sc_is; 647 648 if (prom_getproplen(sc->sc_node, "no-streaming-cache") < 0) { 649 struct strbuf_ctl *sb = &pp->pp_sb; 650 vaddr_t va = (vaddr_t)&pp->pp_flush[0x40]; 651 652 /* 653 * Initialize the strbuf_ctl. 654 * 655 * The flush sync buffer must be 64-byte aligned. 656 */ 657 sb->sb_flush = (void *)(va & ~0x3f); 658 659 bus_space_subregion(sc->sc_bustag, pci_ctl, 660 offsetof(struct pci_ctl, pci_strbuf), 661 sizeof (struct iommu_strbuf), &sb->sb_sb); 662 663 /* Point our iommu at the strbuf_ctl */ 664 sc->sc_is->is_sb[1] = sb; 665 } 666 iommu_reset(sc->sc_is); 667 } 668 669 dict = device_properties(self); 670 pr = get_psychorange(pp, 2); /* memory range */ 671 #ifdef DEBUG 672 printf("memory range: %08x %08x\n", pr->phys_hi, pr->phys_lo); 673 #endif 674 mem_base = ((uint64_t)pr->phys_hi) << 32 | pr->phys_lo; 675 prop_dictionary_set_uint64(dict, "mem_base", mem_base); 676 677 /* 678 * attach the pci.. note we pass PCI A tags, etc., for the sabre here. 679 */ 680 pba.pba_flags = sc->sc_psycho_this->pp_flags; 681 pba.pba_dmat = sc->sc_psycho_this->pp_dmat; 682 pba.pba_dmat64 = NULL; 683 pba.pba_iot = sc->sc_psycho_this->pp_iot; 684 pba.pba_memt = sc->sc_psycho_this->pp_memt; 685 pba.pba_pc = pp->pp_pc; 686 687 config_found(self, &pba, psycho_print, 688 CFARGS(.devhandle = device_handle(self))); 689 } 690 691 static int 692 psycho_print(void *aux, const char *p) 693 { 694 695 if (p == NULL) 696 return (UNCONF); 697 return (QUIET); 698 } 699 700 static void 701 psycho_set_intr(struct psycho_softc *sc, int ipl, void *handler, 702 uint64_t *mapper, uint64_t *clearer) 703 { 704 struct intrhand *ih; 705 706 ih = intrhand_alloc(); 707 ih->ih_arg = sc; 708 ih->ih_map = mapper; 709 ih->ih_clr = clearer; 710 ih->ih_fun = handler; 711 ih->ih_pil = ipl; 712 ih->ih_number = INTVEC(*(ih->ih_map)); 713 ih->ih_pending = 0; 714 intr_establish(ipl, ipl != IPL_VM, ih); 715 *(ih->ih_map) |= INTMAP_V|(CPU_UPAID << INTMAP_TID_SHIFT); 716 } 717 718 /* 719 * power button handlers 720 */ 721 static void 722 psycho_register_power_button(struct psycho_softc *sc) 723 { 724 sysmon_task_queue_init(); 725 726 sc->sc_powerpressed = 0; 727 sc->sc_smcontext = kmem_zalloc(sizeof(struct sysmon_pswitch), KM_SLEEP); 728 sc->sc_smcontext->smpsw_name = device_xname(sc->sc_dev); 729 sc->sc_smcontext->smpsw_type = PSWITCH_TYPE_POWER; 730 if (sysmon_pswitch_register(sc->sc_smcontext) != 0) 731 aprint_error_dev(sc->sc_dev, "unable to register power button with sysmon\n"); 732 } 733 734 static void 735 psycho_power_button_pressed(void *arg) 736 { 737 struct psycho_softc *sc = arg; 738 739 sysmon_pswitch_event(sc->sc_smcontext, PSWITCH_EVENT_PRESSED); 740 sc->sc_powerpressed = 0; 741 } 742 743 /* 744 * PCI bus support 745 */ 746 747 /* 748 * allocate a PCI chipset tag and set its cookie. 749 */ 750 static pci_chipset_tag_t 751 psycho_alloc_chipset(struct psycho_pbm *pp, int node, pci_chipset_tag_t pc) 752 { 753 pci_chipset_tag_t npc; 754 755 npc = kmem_alloc(sizeof *npc, KM_SLEEP); 756 memcpy(npc, pc, sizeof *pc); 757 npc->cookie = pp; 758 npc->rootnode = node; 759 npc->spc_conf_read = psycho_pci_conf_read; 760 npc->spc_conf_write = psycho_pci_conf_write; 761 npc->spc_intr_map = NULL; 762 npc->spc_intr_establish = psycho_pci_intr_establish; 763 npc->spc_find_ino = psycho_pci_find_ino; 764 765 return (npc); 766 } 767 768 /* 769 * create extent for free bus space, then allocate assigned regions. 770 */ 771 static struct extent * 772 psycho_alloc_extent(struct psycho_pbm *pp, int node, int ss, const char *name) 773 { 774 struct psycho_registers *pa = NULL; 775 struct psycho_ranges *pr; 776 struct extent *ex; 777 bus_addr_t baddr, addr; 778 bus_size_t bsize, size; 779 int i, num; 780 781 /* get bus space size */ 782 pr = get_psychorange(pp, ss); 783 if (pr == NULL) { 784 printf("psycho_alloc_extent: get_psychorange failed\n"); 785 return NULL; 786 } 787 baddr = 0x00000000; 788 bsize = BUS_ADDR(pr->size_hi, pr->size_lo); 789 790 /* get available lists */ 791 num = 0; 792 if (prom_getprop(node, "available", sizeof(*pa), &num, &pa)) { 793 printf("psycho_alloc_extent: no \"available\" property\n"); 794 return NULL; 795 } 796 797 /* create extent */ 798 ex = extent_create(name, baddr, bsize - baddr - 1, 0, 0, EX_NOWAIT); 799 if (ex == NULL) { 800 printf("psycho_alloc_extent: extent_create failed\n"); 801 goto ret; 802 } 803 804 /* allocate assigned regions */ 805 for (i = 0; i < num; i++) 806 if (((pa[i].phys_hi >> 24) & 0x03) == ss) { 807 /* allocate bus space */ 808 addr = BUS_ADDR(pa[i].phys_mid, pa[i].phys_lo); 809 size = BUS_ADDR(pa[i].size_hi, pa[i].size_lo); 810 if (extent_alloc_region(ex, baddr, addr - baddr, 811 EX_NOWAIT)) { 812 printf("psycho_alloc_extent: " 813 "extent_alloc_region %" PRIx64 "-%" 814 PRIx64 " failed\n", baddr, addr); 815 extent_destroy(ex); 816 ex = NULL; 817 goto ret; 818 } 819 baddr = addr + size; 820 } 821 /* allocate left region if available */ 822 if (baddr < bsize) 823 if (extent_alloc_region(ex, baddr, bsize - baddr, EX_NOWAIT)) { 824 printf("psycho_alloc_extent: extent_alloc_region %" 825 PRIx64 "-%" PRIx64 " failed\n", baddr, bsize); 826 extent_destroy(ex); 827 ex = NULL; 828 goto ret; 829 } 830 831 #ifdef DEBUG 832 /* print extent */ 833 extent_print(ex); 834 #endif 835 836 ret: 837 /* return extent */ 838 free(pa, M_DEVBUF); 839 return ex; 840 } 841 842 /* 843 * grovel the OBP for various psycho properties 844 */ 845 static void 846 psycho_get_bus_range(int node, int *brp) 847 { 848 int n, error; 849 850 n = 2; 851 error = prom_getprop(node, "bus-range", sizeof(*brp), &n, &brp); 852 if (error) 853 panic("could not get psycho bus-range, error %d", error); 854 if (n != 2) 855 panic("broken psycho bus-range"); 856 DPRINTF(PDB_PROM, ("%s: got `bus-range' for node %08x: %u - %u\n", 857 __func__, node, brp[0], brp[1])); 858 } 859 860 static void 861 psycho_fixup_bus_range(int node0, int *brp0) 862 { 863 int node; 864 int len, busrange[2], *brp; 865 866 DPRINTF(PDB_PROM, 867 ("%s: fixing up `bus-range' for node %08x: %u - %u\n", 868 __func__, node0, brp0[0], brp0[1])); 869 870 /* 871 * Check all nodes under this one and increase the bus range to 872 * match. Recurse through PCI-PCI bridges. Cardbus bridges are 873 * fixed up in pccbb_attach_hook(). Assumes that "bus-range" for 874 * PCI-PCI bridges apart from this one is correct. 875 */ 876 brp0[1] = brp0[0]; 877 node = prom_firstchild(node0); 878 for (node = ((node)); node; node = prom_nextsibling(node)) { 879 len = 2; 880 brp = busrange; 881 if (prom_getprop(node, "bus-range", sizeof(*brp), 882 &len, &brp) != 0) 883 break; 884 if (len != 2) 885 break; 886 psycho_fixup_bus_range(node, busrange); 887 if (brp0[0] > busrange[0] && busrange[0] >= 0) 888 brp0[0] = busrange[0]; 889 if (brp0[1] < busrange[1] && busrange[1] < 256) 890 brp0[1] = busrange[1]; 891 } 892 893 DPRINTF(PDB_PROM, 894 ("%s: fixed up `bus-range' for node %08x: %u - %u\n", 895 __func__, node0, brp[0], brp[1])); 896 } 897 898 static void 899 psycho_get_ranges(int node, struct psycho_ranges **rp, int *np) 900 { 901 902 if (prom_getprop(node, "ranges", sizeof(**rp), np, rp)) 903 panic("could not get psycho ranges"); 904 DPRINTF(PDB_PROM, ("%s: got `ranges' for node %08x: %d entries\n", 905 __func__, node, *np)); 906 } 907 908 /* 909 * Interrupt handlers. 910 */ 911 912 static int 913 psycho_ue(void *arg) 914 { 915 struct psycho_softc *sc = (struct psycho_softc *)arg; 916 struct psychoreg *regs = sc->sc_regs; 917 struct iommu_state *is = sc->sc_is; 918 uint64_t afsr = regs->psy_ue_afsr; 919 uint64_t afar = regs->psy_ue_afar; 920 psize_t size = PAGE_SIZE << is->is_tsbsize; 921 char bits[128]; 922 923 /* 924 * It's uncorrectable. Dump the regs and panic. 925 */ 926 snprintb(bits, sizeof(bits), PSYCHO_UE_AFSR_BITS, afsr); 927 aprint_error_dev(sc->sc_dev, 928 "uncorrectable DMA error AFAR %" PRIx64 " AFSR %s\n", afar, bits); 929 930 /* Sometimes the AFAR points to an IOTSB entry */ 931 if (afar >= is->is_ptsb && afar < is->is_ptsb + size) { 932 aprint_error_dev(sc->sc_dev, 933 "IOVA %" PRIx64 " IOTTE %" PRIx64 "\n", 934 (afar - is->is_ptsb) / sizeof(is->is_tsb[0]) * PAGE_SIZE 935 + is->is_dvmabase, ldxa(afar, ASI_PHYS_CACHED)); 936 } 937 #ifdef DDB 938 Debugger(); 939 #endif 940 regs->psy_ue_afar = 0; 941 regs->psy_ue_afsr = 0; 942 return (1); 943 } 944 945 static int 946 psycho_ce(void *arg) 947 { 948 struct psycho_softc *sc = (struct psycho_softc *)arg; 949 struct psychoreg *regs = sc->sc_regs; 950 951 /* 952 * It's correctable. Dump the regs and continue. 953 */ 954 aprint_error_dev(sc->sc_dev, 955 "correctable DMA error AFAR %" PRIx64 " AFSR %" PRIx64 "\n", 956 regs->psy_ce_afar, regs->psy_ce_afsr); 957 return (1); 958 } 959 960 static int 961 psycho_bus_a(void *arg) 962 { 963 struct psycho_softc *sc = (struct psycho_softc *)arg; 964 struct psychoreg *regs = sc->sc_regs; 965 966 /* 967 * It's uncorrectable. Dump the regs and panic. 968 */ 969 970 panic("%s: PCI bus A error AFAR %" PRIx64 " AFSR %" PRIx64, 971 device_xname(sc->sc_dev), 972 regs->psy_pcictl[0].pci_afar, regs->psy_pcictl[0].pci_afsr); 973 return (1); 974 } 975 976 static int 977 psycho_bus_b(void *arg) 978 { 979 struct psycho_softc *sc = (struct psycho_softc *)arg; 980 struct psychoreg *regs = sc->sc_regs; 981 982 /* 983 * It's uncorrectable. Dump the regs and panic. 984 */ 985 986 panic("%s: PCI bus B error AFAR %" PRIx64 " AFSR %" PRIx64, 987 device_xname(sc->sc_dev), 988 regs->psy_pcictl[0].pci_afar, regs->psy_pcictl[0].pci_afsr); 989 return (1); 990 } 991 992 static int 993 psycho_powerfail(void *arg) 994 { 995 struct psycho_softc *sc = (struct psycho_softc *)arg; 996 997 /* 998 * We lost power. Queue a callback with thread context to 999 * handle all the real work. 1000 */ 1001 if (sc->sc_powerpressed == 0 && sc->sc_smcontext != NULL) { 1002 sc->sc_powerpressed = 1; 1003 sysmon_task_queue_sched(0, psycho_power_button_pressed, sc); 1004 } 1005 return (1); 1006 } 1007 1008 static 1009 int psycho_wakeup(void *arg) 1010 { 1011 struct psycho_softc *sc = (struct psycho_softc *)arg; 1012 1013 /* 1014 * Gee, we don't really have a framework to deal with this 1015 * properly. 1016 */ 1017 aprint_error_dev(sc->sc_dev, "power management wakeup\n"); 1018 return (1); 1019 } 1020 1021 1022 /* 1023 * initialise the IOMMU.. 1024 */ 1025 void 1026 psycho_iommu_init(struct psycho_softc *sc, int tsbsize) 1027 { 1028 char *name; 1029 struct iommu_state *is = sc->sc_is; 1030 uint32_t iobase = -1; 1031 int *vdma = NULL; 1032 int nitem; 1033 1034 /* punch in our copies */ 1035 is->is_bustag = sc->sc_bustag; 1036 bus_space_subregion(sc->sc_bustag, sc->sc_bh, 1037 offsetof(struct psychoreg, psy_iommu), 1038 sizeof (struct iommureg), 1039 &is->is_iommu); 1040 1041 /* 1042 * Separate the men from the boys. Get the `virtual-dma' 1043 * property for sabre and use that to make sure the damn 1044 * iommu works. 1045 * 1046 * We could query the `#virtual-dma-size-cells' and 1047 * `#virtual-dma-addr-cells' and DTRT, but I'm lazy. 1048 */ 1049 nitem = 0; 1050 if (!prom_getprop(sc->sc_node, "virtual-dma", sizeof(vdma), &nitem, 1051 &vdma)) { 1052 /* Damn. Gotta use these values. */ 1053 iobase = vdma[0]; 1054 #define TSBCASE(x) case 1<<((x)+23): tsbsize = (x); break 1055 switch (vdma[1]) { 1056 TSBCASE(1); 1057 TSBCASE(2); 1058 TSBCASE(3); 1059 TSBCASE(4); 1060 TSBCASE(5); 1061 TSBCASE(6); 1062 TSBCASE(7); 1063 default: 1064 printf("bogus tsb size %x, using 7\n", vdma[1]); 1065 tsbsize = 7; 1066 } 1067 #undef TSBCASE 1068 } 1069 1070 /* give us a nice name.. */ 1071 name = kmem_asprintf("%s dvma", device_xname(sc->sc_dev)); 1072 1073 iommu_init(name, is, tsbsize, iobase); 1074 } 1075 1076 /* 1077 * below here is bus space and bus DMA support 1078 */ 1079 bus_space_tag_t 1080 psycho_alloc_bus_tag(struct psycho_pbm *pp, int type) 1081 { 1082 struct psycho_softc *sc = pp->pp_sc; 1083 bus_space_tag_t bt; 1084 1085 bt = kmem_zalloc(sizeof(*bt), KM_SLEEP); 1086 bt->cookie = pp; 1087 bt->parent = sc->sc_bustag; 1088 bt->type = type; 1089 bt->sparc_bus_map = _psycho_bus_map; 1090 bt->sparc_bus_mmap = psycho_bus_mmap; 1091 bt->sparc_intr_establish = psycho_intr_establish; 1092 return (bt); 1093 } 1094 1095 bus_dma_tag_t 1096 psycho_alloc_dma_tag(struct psycho_pbm *pp) 1097 { 1098 struct psycho_softc *sc = pp->pp_sc; 1099 bus_dma_tag_t dt, pdt = sc->sc_dmatag; 1100 1101 dt = kmem_zalloc(sizeof(*dt), KM_SLEEP); 1102 dt->_cookie = pp; 1103 dt->_parent = pdt; 1104 #define PCOPY(x) dt->x = pdt->x 1105 dt->_dmamap_create = psycho_dmamap_create; 1106 PCOPY(_dmamap_destroy); 1107 dt->_dmamap_load = iommu_dvmamap_load; 1108 PCOPY(_dmamap_load_mbuf); 1109 PCOPY(_dmamap_load_uio); 1110 dt->_dmamap_load_raw = iommu_dvmamap_load_raw; 1111 dt->_dmamap_unload = iommu_dvmamap_unload; 1112 if (sc->sc_mode == PSYCHO_MODE_SABRE) 1113 dt->_dmamap_sync = psycho_sabre_dmamap_sync; 1114 else 1115 dt->_dmamap_sync = iommu_dvmamap_sync; 1116 dt->_dmamem_alloc = iommu_dvmamem_alloc; 1117 dt->_dmamem_free = iommu_dvmamem_free; 1118 dt->_dmamem_map = iommu_dvmamem_map; 1119 dt->_dmamem_unmap = iommu_dvmamem_unmap; 1120 PCOPY(_dmamem_mmap); 1121 #undef PCOPY 1122 return (dt); 1123 } 1124 1125 /* 1126 * bus space support. <sparc64/dev/psychoreg.h> has a discussion about 1127 * PCI physical addresses. 1128 */ 1129 1130 static struct psycho_ranges * 1131 get_psychorange(struct psycho_pbm *pp, int ss) 1132 { 1133 int i; 1134 1135 for (i = 0; i < pp->pp_nrange; i++) { 1136 if (((pp->pp_range[i].cspace >> 24) & 0x03) == ss) 1137 return (&pp->pp_range[i]); 1138 } 1139 /* not found */ 1140 return (NULL); 1141 } 1142 1143 static int 1144 _psycho_bus_map(bus_space_tag_t t, bus_addr_t offset, bus_size_t size, 1145 int flags, vaddr_t unused, bus_space_handle_t *hp) 1146 { 1147 struct psycho_pbm *pp = t->cookie; 1148 struct psycho_softc *sc = pp->pp_sc; 1149 struct psycho_ranges *pr; 1150 bus_addr_t paddr; 1151 int ss; 1152 1153 DPRINTF(PDB_BUSMAP, 1154 ("%s: type %d off %qx sz %qx flags %d", 1155 __func__, t->type, (unsigned long long)offset, 1156 (unsigned long long)size, flags)); 1157 1158 flags &= ~BUS_SPACE_MAP_PREFETCHABLE; 1159 1160 ss = sparc_pci_childspace(t->type); 1161 DPRINTF(PDB_BUSMAP, (" cspace %d", ss)); 1162 1163 pr = get_psychorange(pp, ss); 1164 if (pr != NULL) { 1165 paddr = BUS_ADDR(pr->phys_hi, pr->phys_lo + offset); 1166 DPRINTF(PDB_BUSMAP, ("\n%s: mapping paddr " 1167 "space %lx offset %lx paddr %qx\n", 1168 __func__, (long)ss, (long)offset, 1169 (unsigned long long)paddr)); 1170 return ((*sc->sc_bustag->sparc_bus_map)(t, paddr, size, 1171 flags, 0, hp)); 1172 } 1173 DPRINTF(PDB_BUSMAP, (" FAILED\n")); 1174 return (EINVAL); 1175 } 1176 1177 static paddr_t 1178 psycho_bus_mmap(bus_space_tag_t t, bus_addr_t paddr, off_t off, int prot, 1179 int flags) 1180 { 1181 bus_addr_t offset = paddr; 1182 struct psycho_pbm *pp = t->cookie; 1183 struct psycho_softc *sc = pp->pp_sc; 1184 struct psycho_ranges *pr; 1185 int ss; 1186 1187 flags &= ~BUS_SPACE_MAP_PREFETCHABLE; 1188 1189 ss = sparc_pci_childspace(t->type); 1190 1191 DPRINTF(PDB_BUSMAP, ("%s: prot %x flags %d busaddr %qx\n", 1192 __func__, prot, flags, (unsigned long long)paddr)); 1193 1194 pr = get_psychorange(pp, ss); 1195 if (pr != NULL) { 1196 paddr = BUS_ADDR(pr->phys_hi, pr->phys_lo + offset); 1197 DPRINTF(PDB_BUSMAP, ("%s: mapping paddr " 1198 "space %lx offset %lx paddr %qx\n", 1199 __func__, (long)ss, (long)offset, 1200 (unsigned long long)paddr)); 1201 return (bus_space_mmap(sc->sc_bustag, paddr, off, 1202 prot, flags)); 1203 } 1204 1205 return (-1); 1206 } 1207 1208 /* 1209 * Get a PCI offset address from bus_space_handle_t. 1210 */ 1211 bus_addr_t 1212 psycho_bus_offset(bus_space_tag_t t, bus_space_handle_t *hp) 1213 { 1214 struct psycho_pbm *pp = t->cookie; 1215 struct psycho_ranges *pr; 1216 bus_addr_t addr, offset; 1217 vaddr_t va; 1218 int ss; 1219 1220 addr = hp->_ptr; 1221 ss = sparc_pci_childspace(t->type); 1222 DPRINTF(PDB_BUSMAP, ("%s: type %d addr %" PRIx64" cspace %d", 1223 __func__, t->type, addr, ss)); 1224 1225 pr = get_psychorange(pp, ss); 1226 if (pr != NULL) { 1227 if (!PHYS_ASI(hp->_asi)) { 1228 va = trunc_page((vaddr_t)addr); 1229 if (pmap_extract(pmap_kernel(), va, &addr) == FALSE) { 1230 DPRINTF(PDB_BUSMAP, 1231 ("- pmap_extract FAILED\n")); 1232 return (-1); 1233 } 1234 addr += hp->_ptr & PGOFSET; 1235 } 1236 offset = BUS_ADDR_PADDR(addr) - pr->phys_lo; 1237 DPRINTF(PDB_BUSMAP, ("- paddr %" PRIx64" offset %" PRIx64 "\n", 1238 addr, offset)); 1239 return (offset); 1240 } 1241 DPRINTF(PDB_BUSMAP, ("- FAILED\n")); 1242 return (-1); 1243 } 1244 1245 1246 /* 1247 * install an interrupt handler for a PCI device 1248 */ 1249 void * 1250 psycho_intr_establish(bus_space_tag_t t, int ihandle, int level, 1251 int (*handler)(void *), void *arg, void (*fastvec)(void) /* ignored */) 1252 { 1253 struct psycho_pbm *pp = t->cookie; 1254 struct psycho_softc *sc = pp->pp_sc; 1255 struct intrhand *ih; 1256 volatile uint64_t *intrmapptr = NULL, *intrclrptr = NULL; 1257 int64_t imap = 0; 1258 int ino; 1259 long vec = INTVEC(ihandle); 1260 1261 ih = intrhand_alloc(); 1262 1263 ih->ih_ivec = ihandle; 1264 1265 /* 1266 * Hunt through all the interrupt mapping regs to look for our 1267 * interrupt vector. 1268 * 1269 * XXX We only compare INOs rather than IGNs since the firmware may 1270 * not provide the IGN and the IGN is constant for all device on that 1271 * PCI controller. This could cause problems for the FFB/external 1272 * interrupt which has a full vector that can be set arbitrarily. 1273 */ 1274 1275 DPRINTF(PDB_INTR, ("%s: ihandle %x vec %lx", __func__, ihandle, vec)); 1276 ino = INTINO(vec); 1277 DPRINTF(PDB_INTR, (" ino %x\n", ino)); 1278 1279 /* If the device didn't ask for an IPL, use the one encoded. */ 1280 if (level == IPL_NONE) level = INTLEV(vec); 1281 /* If it still has no level, print a warning and assign IPL 2 */ 1282 if (level == IPL_NONE) { 1283 printf("ERROR: no IPL, setting IPL 2.\n"); 1284 level = 2; 1285 } 1286 1287 DPRINTF(PDB_INTR, ("%s: intr %lx: %p\nHunting for IRQ...\n", 1288 __func__, (long)ino, intrlev[ino])); 1289 1290 /* 1291 * First look for PCI interrupts, otherwise the PCI A slot 0 1292 * INTA# interrupt might match an unused non-PCI (obio) 1293 * interrupt. 1294 */ 1295 for (intrmapptr = &sc->sc_regs->pcia_slot0_int, 1296 intrclrptr = &sc->sc_regs->pcia0_clr_int[0]; 1297 intrmapptr <= &sc->sc_regs->pcib_slot3_int; 1298 intrmapptr++, intrclrptr += 4) { 1299 if (sc->sc_mode == PSYCHO_MODE_PSYCHO && 1300 (intrmapptr == &sc->sc_regs->pcia_slot2_int || 1301 intrmapptr == &sc->sc_regs->pcia_slot3_int)) 1302 continue; 1303 if (((*intrmapptr ^ vec) & 0x3c) == 0) { 1304 intrclrptr += vec & 0x3; 1305 goto found; 1306 } 1307 } 1308 1309 /* Now hunt thru obio. */ 1310 for (intrmapptr = &sc->sc_regs->scsi_int_map, 1311 intrclrptr = &sc->sc_regs->scsi_clr_int; 1312 intrmapptr < &sc->sc_regs->ue_int_map; 1313 intrmapptr++, intrclrptr++) { 1314 if (INTINO(*intrmapptr) == ino) 1315 goto found; 1316 } 1317 1318 /* Finally check the two FFB slots */ 1319 intrclrptr = NULL; /* XXX? */ 1320 for (intrmapptr = &sc->sc_regs->ffb0_int_map; 1321 intrmapptr <= &sc->sc_regs->ffb1_int_map; 1322 intrmapptr++) { 1323 if (INTVEC(*intrmapptr) == ino) 1324 goto found; 1325 } 1326 1327 printf("Cannot find interrupt vector %lx\n", vec); 1328 kmem_free(ih, sizeof(*ih)); 1329 return (NULL); 1330 1331 found: 1332 /* Register the map and clear intr registers */ 1333 ih->ih_map = intrmapptr; 1334 ih->ih_clr = intrclrptr; 1335 1336 ih->ih_fun = handler; 1337 ih->ih_arg = arg; 1338 ih->ih_pil = level; 1339 ih->ih_number = ino | sc->sc_ign; 1340 ih->ih_pending = 0; 1341 1342 DPRINTF(PDB_INTR, ( 1343 "%s: installing handler %p arg %p with ino %u pil %u\n", 1344 __func__, handler, arg, (u_int)ino, (u_int)ih->ih_pil)); 1345 1346 intr_establish(ih->ih_pil, level != IPL_VM, ih); 1347 1348 /* 1349 * Enable the interrupt now we have the handler installed. 1350 * Read the current value as we can't change it besides the 1351 * valid bit so so make sure only this bit is changed. 1352 * 1353 * XXXX --- we really should use bus_space for this. 1354 */ 1355 if (intrmapptr) { 1356 imap = *intrmapptr; 1357 DPRINTF(PDB_INTR, ("%s: read intrmap = %016qx", 1358 __func__, (unsigned long long)imap)); 1359 1360 /* Enable the interrupt */ 1361 imap |= INTMAP_V|(CPU_UPAID << INTMAP_TID_SHIFT); 1362 DPRINTF(PDB_INTR, ("; addr of intrmapptr = %p", intrmapptr)); 1363 DPRINTF(PDB_INTR, ("; writing intrmap = %016qx\n", 1364 (unsigned long long)imap)); 1365 *intrmapptr = imap; 1366 DPRINTF(PDB_INTR, ("; reread intrmap = %016qx\n", 1367 (unsigned long long)(imap = *intrmapptr))); 1368 } 1369 if (intrclrptr) { 1370 /* set state to IDLE */ 1371 *intrclrptr = 0; 1372 } 1373 return (ih); 1374 } 1375 1376 /* 1377 * per-controller driver calls 1378 */ 1379 1380 /* assume we are mapped little-endian/side-effect */ 1381 static pcireg_t 1382 psycho_pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg) 1383 { 1384 struct psycho_pbm *pp = pc->cookie; 1385 struct psycho_softc *sc = pp->pp_sc; 1386 pcireg_t val = (pcireg_t)~0; 1387 int s; 1388 1389 DPRINTF(PDB_CONF, ("%s: tag %lx reg %x ", __func__, 1390 (long)tag, reg)); 1391 if (PCITAG_NODE(tag) != -1 && (unsigned int)reg < PCI_CONF_SIZE) { 1392 1393 DPRINTF(PDB_CONF, ("asi=%x addr=%qx (offset=%x) ...", 1394 sc->sc_configaddr._asi, 1395 (long long)(sc->sc_configaddr._ptr + 1396 PCITAG_OFFSET(tag) + reg), 1397 (int)PCITAG_OFFSET(tag) + reg)); 1398 1399 s = splhigh(); 1400 struct cpu_info *ci = curcpu(); 1401 ci->ci_pci_probe = true; 1402 membar_Sync(); 1403 val = bus_space_read_4(sc->sc_configtag, sc->sc_configaddr, 1404 PCITAG_OFFSET(tag) + reg); 1405 membar_Sync(); 1406 if (ci->ci_pci_fault) 1407 val = (pcireg_t)~0; 1408 ci->ci_pci_probe = ci->ci_pci_fault = false; 1409 splx(s); 1410 } 1411 #ifdef DEBUG 1412 else DPRINTF(PDB_CONF, ("%s: bogus pcitag %x -", __func__, 1413 (int)PCITAG_OFFSET(tag))); 1414 #endif 1415 DPRINTF(PDB_CONF, (" returning %08x\n", (u_int)val)); 1416 1417 return (val); 1418 } 1419 1420 static void 1421 psycho_pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data) 1422 { 1423 struct psycho_pbm *pp = pc->cookie; 1424 struct psycho_softc *sc = pp->pp_sc; 1425 1426 DPRINTF(PDB_CONF, ("%s: tag %lx; reg %x; data %x; ", __func__, 1427 (long)PCITAG_OFFSET(tag), reg, (int)data)); 1428 DPRINTF(PDB_CONF, ("asi = %x; readaddr = %qx (offset = %x)\n", 1429 sc->sc_configaddr._asi, 1430 (long long)(sc->sc_configaddr._ptr + PCITAG_OFFSET(tag) + reg), 1431 (int)PCITAG_OFFSET(tag) + reg)); 1432 1433 /* If we don't know it, just punt it. */ 1434 if (PCITAG_NODE(tag) == -1) { 1435 DPRINTF(PDB_CONF, ("%s: bad addr", __func__)); 1436 return; 1437 } 1438 1439 if ((unsigned int)reg >= PCI_CONF_SIZE) 1440 return; 1441 1442 bus_space_write_4(sc->sc_configtag, sc->sc_configaddr, 1443 PCITAG_OFFSET(tag) + reg, data); 1444 } 1445 1446 static void * 1447 psycho_pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level, 1448 int (*func)(void *), void *arg) 1449 { 1450 void *cookie; 1451 struct psycho_pbm *pp = (struct psycho_pbm *)pc->cookie; 1452 1453 DPRINTF(PDB_INTR, ("%s: ih %lx; level %d", __func__, (u_long)ih, level)); 1454 cookie = bus_intr_establish(pp->pp_memt, ih, level, func, arg); 1455 1456 DPRINTF(PDB_INTR, ("; returning handle %p\n", cookie)); 1457 return (cookie); 1458 } 1459 1460 static int 1461 psycho_pci_find_ino(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 1462 { 1463 struct psycho_pbm *pp = pa->pa_pc->cookie; 1464 struct psycho_softc *sc = pp->pp_sc; 1465 u_int bus; 1466 u_int dev; 1467 u_int pin; 1468 1469 DPRINTF(PDB_INTMAP, ("%s: pa_tag: node %x, %d:%d:%d\n", __func__, 1470 PCITAG_NODE(pa->pa_tag), (int)PCITAG_BUS(pa->pa_tag), 1471 (int)PCITAG_DEV(pa->pa_tag), 1472 (int)PCITAG_FUN(pa->pa_tag))); 1473 DPRINTF(PDB_INTMAP, 1474 ("%s: intrswiz %d, intrpin %d, intrline %d, rawintrpin %d\n", __func__, 1475 pa->pa_intrswiz, pa->pa_intrpin, pa->pa_intrline, pa->pa_rawintrpin)); 1476 DPRINTF(PDB_INTMAP, ("%s: pa_intrtag: node %x, %d:%d:%d\n", __func__, 1477 PCITAG_NODE(pa->pa_intrtag), 1478 (int)PCITAG_BUS(pa->pa_intrtag), 1479 (int)PCITAG_DEV(pa->pa_intrtag), 1480 (int)PCITAG_FUN(pa->pa_intrtag))); 1481 1482 bus = (pp->pp_id == PSYCHO_PBM_B); 1483 /* 1484 * If we are on a ppb, use the devno on the underlying bus when forming 1485 * the ivec. 1486 */ 1487 if (pa->pa_intrswiz != 0 && PCITAG_NODE(pa->pa_intrtag) != 0) 1488 dev = PCITAG_DEV(pa->pa_intrtag); 1489 else 1490 dev = pa->pa_device; 1491 dev--; 1492 1493 if (sc->sc_mode == PSYCHO_MODE_PSYCHO && 1494 pp->pp_id == PSYCHO_PBM_B) 1495 dev--; 1496 1497 pin = pa->pa_intrpin - 1; 1498 DPRINTF(PDB_INTMAP, ("%s: mode %d, pbm %d, dev %d, pin %d\n", __func__, 1499 sc->sc_mode, pp->pp_id, dev, pin)); 1500 1501 *ihp = sc->sc_ign | ((bus << 4) & INTMAP_PCIBUS) | 1502 ((dev << 2) & INTMAP_PCISLOT) | (pin & INTMAP_PCIINT); 1503 1504 return (0); 1505 } 1506 1507 /* 1508 * hooks into the iommu dvma calls. 1509 */ 1510 static int 1511 psycho_dmamap_create(bus_dma_tag_t t, bus_size_t size, int nsegments, 1512 bus_size_t maxsegsz, bus_size_t boundary, int flags, 1513 bus_dmamap_t *dmamp) 1514 { 1515 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1516 int error; 1517 1518 error = bus_dmamap_create(t->_parent, size, nsegments, maxsegsz, 1519 boundary, flags, dmamp); 1520 if (error == 0) 1521 (*dmamp)->_dm_cookie = &pp->pp_sb; 1522 return error; 1523 } 1524 1525 /* 1526 * UltraSPARC IIi and IIe have no streaming buffers, but have PCI DMA 1527 * Write Synchronization Register (see UltraSPARC-IIi User's Manual 1528 * section 19.3.0.5). So use it to synchronize with the DMA writes. 1529 */ 1530 static void 1531 psycho_sabre_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset, 1532 bus_size_t len, int ops) 1533 { 1534 struct psycho_pbm *pp; 1535 struct psycho_softc *sc; 1536 1537 /* If len is 0, then there is nothing to do. */ 1538 if (len == 0) 1539 return; 1540 1541 if (ops & BUS_DMASYNC_POSTREAD) { 1542 pp = (struct psycho_pbm *)t->_cookie; 1543 sc = pp->pp_sc; 1544 bus_space_read_8(sc->sc_bustag, sc->sc_bh, 1545 offsetof(struct psychoreg, pci_dma_write_sync)); 1546 } 1547 bus_dmamap_sync(t->_parent, map, offset, len, ops); 1548 } 1549 1550 /* US-IIe STICK support */ 1551 1552 uint64_t 1553 psycho_getstick(void) 1554 { 1555 uint64_t stick; 1556 1557 stick = bus_space_read_8(psycho0->sc_bustag, psycho0->sc_bh, 1558 STICK_CNT_LOW) | 1559 (bus_space_read_8(psycho0->sc_bustag, psycho0->sc_bh, 1560 STICK_CNT_HIGH) & 0x7fffffff) << 32; 1561 return stick; 1562 } 1563 1564 uint32_t 1565 psycho_getstick32(void) 1566 { 1567 1568 return bus_space_read_8(psycho0->sc_bustag, psycho0->sc_bh, 1569 STICK_CNT_LOW); 1570 } 1571 1572 void 1573 psycho_setstick(long cnt) 1574 { 1575 1576 /* 1577 * looks like we can't actually write the STICK counter, so instead we 1578 * prepare sc_last_stick for the coming interrupt setup 1579 */ 1580 #if 0 1581 bus_space_write_8(psycho0->sc_bustag, psycho0->sc_bh, 1582 STICK_CNT_HIGH, (cnt >> 32)); 1583 bus_space_write_8(psycho0->sc_bustag, psycho0->sc_bh, 1584 STICK_CNT_LOW, (uint32_t)(cnt & 0xffffffff)); 1585 #endif 1586 1587 if (cnt == 0) { 1588 bus_space_write_8(psycho0->sc_bustag, psycho0->sc_bh, 1589 STICK_CMP_HIGH, 0); 1590 bus_space_write_8(psycho0->sc_bustag, psycho0->sc_bh, 1591 STICK_CMP_LOW, 0); 1592 psycho0->sc_last_stick = 0; 1593 } 1594 1595 psycho0->sc_last_stick = psycho_getstick(); 1596 DPRINTF(PDB_STICK, ("%s: %ld\n", __func__, psycho0->sc_last_stick)); 1597 } 1598 1599 void 1600 psycho_nextstick(long diff) 1601 { 1602 uint64_t cmp, now; 1603 1604 /* 1605 * there is no way we'll ever overflow 1606 * the counter is 63 bits wide, at 12MHz that's >24000 years 1607 */ 1608 now = psycho_getstick() + 1000; 1609 cmp = psycho0->sc_last_stick; 1610 1611 while (cmp < now) 1612 cmp += diff; 1613 1614 bus_space_write_8(psycho0->sc_bustag, psycho0->sc_bh, 1615 STICK_CMP_HIGH, (cmp >> 32) & 0x7fffffff); 1616 bus_space_write_8(psycho0->sc_bustag, psycho0->sc_bh, 1617 STICK_CMP_LOW, (cmp & 0xffffffff)); 1618 1619 psycho0->sc_last_stick = cmp; 1620 } 1621
Indexes created Wed Sep 24 05:09:52 GMT 2025