1 /* $NetBSD: pxa2x0_i2c.c,v 1.9 2021/12/12 08:49:57 andvar Exp $ */ 2 /* $OpenBSD: pxa2x0_i2c.c,v 1.2 2005/05/26 03:52:07 pascoe Exp $ */ 3 4 /* 5 * Copyright (c) 2005 Christopher Pascoe <pascoe (at) openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #include <sys/cdefs.h> 21 __KERNEL_RCSID(0, "$NetBSD: pxa2x0_i2c.c,v 1.9 2021/12/12 08:49:57 andvar Exp $"); 22 23 #include <sys/param.h> 24 #include <sys/bus.h> 25 #include <sys/device.h> 26 #include <sys/errno.h> 27 #include <sys/systm.h> 28 29 #include <dev/i2c/i2cvar.h> 30 31 #include <arm/xscale/pxa2x0reg.h> 32 #include <arm/xscale/pxa2x0var.h> 33 #include <arm/xscale/pxa2x0_i2c.h> 34 35 #ifdef PXAIIC_DEBUG 36 #define DPRINTF(s) printf s 37 #else 38 #define DPRINTF(s) do { } while (/*CONSTCOND*/0) 39 #endif 40 41 #define I2C_RETRY_COUNT 10 42 43 int 44 pxa2x0_i2c_attach_sub(struct pxa2x0_i2c_softc *sc) 45 { 46 int error; 47 48 error = bus_space_map(sc->sc_iot, sc->sc_addr, sc->sc_size, 0, 49 &sc->sc_ioh); 50 if (error) { 51 aprint_error_dev(sc->sc_dev, "unable to map register\n"); 52 sc->sc_size = 0; 53 return error; 54 } 55 56 bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, sc->sc_size, 57 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE); 58 59 sc->sc_icr = ICR_GCD | ICR_SCLE | ICR_IUE; 60 #if 0 61 if (ISSET(sc->sc_flags, PI2CF_ENABLE_INTR)) 62 sc->sc_icr |= ICR_BEIE | ICR_DRFIE | ICR_ITEIE; 63 #endif 64 if (ISSET(sc->sc_flags, PI2CF_FAST_MODE)) 65 sc->sc_icr |= ICR_FM; 66 67 pxa2x0_i2c_init(sc); 68 69 return 0; 70 } 71 72 int 73 pxa2x0_i2c_detach_sub(struct pxa2x0_i2c_softc *sc) 74 { 75 76 if (sc->sc_size != 0) { 77 bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_size); 78 sc->sc_size = 0; 79 } 80 pxa2x0_clkman_config(CKEN_I2C, 0); 81 return 0; 82 } 83 84 void 85 pxa2x0_i2c_init(struct pxa2x0_i2c_softc *sc) 86 { 87 88 pxa2x0_i2c_open(sc); 89 pxa2x0_i2c_close(sc); 90 } 91 92 void 93 pxa2x0_i2c_open(struct pxa2x0_i2c_softc *sc) 94 { 95 96 /* Enable the clock to the standard I2C unit. */ 97 pxa2x0_clkman_config(CKEN_I2C, 1); 98 } 99 100 void 101 pxa2x0_i2c_close(struct pxa2x0_i2c_softc *sc) 102 { 103 104 /* Reset and disable the standard I2C unit. */ 105 bus_space_write_4(sc->sc_iot, sc->sc_ioh, I2C_ICR, ICR_UR); 106 bus_space_write_4(sc->sc_iot, sc->sc_ioh, I2C_ISAR, 0); 107 delay(1); 108 pxa2x0_clkman_config(CKEN_I2C, 0); 109 } 110 111 int 112 pxa2x0_i2c_read(struct pxa2x0_i2c_softc *sc, u_char slave, u_char *valuep) 113 { 114 bus_space_tag_t iot = sc->sc_iot; 115 bus_space_handle_t ioh = sc->sc_ioh; 116 int timeout; 117 int tries = I2C_RETRY_COUNT; 118 uint32_t rv; 119 120 retry: 121 bus_space_write_4(iot, ioh, I2C_ICR, ICR_UR); 122 bus_space_write_4(iot, ioh, I2C_ISAR, sc->sc_isar); 123 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE | ISR_IRF); 124 delay(1); 125 bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_SCLE); 126 127 /* Write slave device address. */ 128 bus_space_write_4(iot, ioh, I2C_IDBR, (slave<<1) | 0x1); 129 rv = bus_space_read_4(iot, ioh, I2C_ICR); 130 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_START); 131 rv = bus_space_read_4(iot, ioh, I2C_ICR); 132 bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_STOP); 133 rv = bus_space_read_4(iot, ioh, I2C_ICR); 134 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_TB); 135 136 timeout = 10000; 137 while ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ITE) == 0) { 138 if (timeout-- == 0) 139 goto err; 140 delay(1); 141 } 142 143 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 144 145 rv = bus_space_read_4(iot, ioh, I2C_ICR); 146 bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_START); 147 148 /* Read data value. */ 149 rv = bus_space_read_4(iot, ioh, I2C_ICR); 150 bus_space_write_4(iot, ioh, I2C_ICR, rv | 151 (ICR_STOP | ICR_ACKNAK)); 152 rv = bus_space_read_4(iot, ioh, I2C_ICR); 153 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_TB); 154 155 timeout = 10000; 156 while ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_IRF) == 0) { 157 if (timeout-- == 0) 158 goto err; 159 delay(1); 160 } 161 162 bus_space_write_4(iot, ioh, I2C_ISR, ISR_IRF); 163 164 rv = bus_space_read_4(iot, ioh, I2C_IDBR); 165 *valuep = (u_char)rv; 166 bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_BEIE | ICR_SADIE); 167 168 return 0; 169 170 err: 171 if (tries-- >= 0) 172 goto retry; 173 174 bus_space_write_4(iot, ioh, I2C_ICR, ICR_UR); 175 bus_space_write_4(iot, ioh, I2C_ISAR, sc->sc_isar); 176 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE | ISR_IRF); 177 bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_BEIE | ICR_SADIE); 178 179 return EIO; 180 } 181 182 int 183 pxa2x0_i2c_write(struct pxa2x0_i2c_softc *sc, u_char slave, u_char value) 184 { 185 bus_space_tag_t iot = sc->sc_iot; 186 bus_space_handle_t ioh = sc->sc_ioh; 187 int timeout; 188 int tries = I2C_RETRY_COUNT; 189 uint32_t rv; 190 191 retry: 192 bus_space_write_4(iot, ioh, I2C_ICR, ICR_UR); 193 bus_space_write_4(iot, ioh, I2C_ISAR, sc->sc_isar); 194 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 195 delay(1); 196 bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_SCLE); 197 198 /* Write slave device address. */ 199 bus_space_write_4(iot, ioh, I2C_IDBR, (slave<<1)); 200 rv = bus_space_read_4(iot, ioh, I2C_ICR); 201 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_START); 202 rv = bus_space_read_4(iot, ioh, I2C_ICR); 203 bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_STOP); 204 rv = bus_space_read_4(iot, ioh, I2C_ICR); 205 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_TB); 206 207 timeout = 10000; 208 while ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ITE) == 0) { 209 if (timeout-- == 0) 210 goto err; 211 delay(1); 212 } 213 if ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ACKNAK) != 0) 214 goto err; 215 216 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 217 218 /* Write data. */ 219 rv = bus_space_read_4(iot, ioh, I2C_ICR); 220 bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_START); 221 rv = bus_space_read_4(iot, ioh, I2C_ICR); 222 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_STOP); 223 bus_space_write_4(iot, ioh, I2C_IDBR, value); 224 rv = bus_space_read_4(iot, ioh, I2C_ICR); 225 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_TB); 226 227 timeout = 10000; 228 while ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ITE) == 0) { 229 if (timeout-- == 0) 230 goto err; 231 delay(1); 232 } 233 if ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ACKNAK) != 0) 234 goto err; 235 236 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 237 238 bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_BEIE | ICR_SADIE); 239 240 return 0; 241 242 err: 243 if (tries-- >= 0) 244 goto retry; 245 246 bus_space_write_4(iot, ioh, I2C_ICR, ICR_UR); 247 bus_space_write_4(iot, ioh, I2C_ISAR, sc->sc_isar); 248 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 249 bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_BEIE | ICR_SADIE); 250 251 return EIO; 252 } 253 254 /* 255 * XXX The quick_{read,write} operations are untested! 256 */ 257 int 258 pxa2x0_i2c_quick(struct pxa2x0_i2c_softc *sc, u_char slave, u_char rw) 259 { 260 bus_space_tag_t iot = sc->sc_iot; 261 bus_space_handle_t ioh = sc->sc_ioh; 262 int timeout; 263 int tries = I2C_RETRY_COUNT; 264 uint32_t rv; 265 266 retry: 267 bus_space_write_4(iot, ioh, I2C_ICR, ICR_UR); 268 bus_space_write_4(iot, ioh, I2C_ISAR, sc->sc_isar); 269 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 270 delay(1); 271 bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_SCLE); 272 273 /* Write slave device address. */ 274 bus_space_write_4(iot, ioh, I2C_IDBR, (slave<<1) | (rw & 1)); 275 rv = bus_space_read_4(iot, ioh, I2C_ICR); 276 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_START); 277 rv = bus_space_read_4(iot, ioh, I2C_ICR); 278 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_STOP); 279 rv = bus_space_read_4(iot, ioh, I2C_ICR); 280 281 timeout = 10000; 282 while ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ITE) == 0) { 283 if (timeout-- == 0) 284 goto err; 285 delay(1); 286 } 287 if ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ACKNAK) != 0) 288 goto err; 289 290 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 291 292 bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_BEIE | ICR_SADIE); 293 294 return 0; 295 296 err: 297 if (tries-- >= 0) 298 goto retry; 299 300 bus_space_write_4(iot, ioh, I2C_ICR, ICR_UR); 301 bus_space_write_4(iot, ioh, I2C_ISAR, sc->sc_isar); 302 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 303 bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_BEIE | ICR_SADIE); 304 305 return EIO; 306 } 307 308 int 309 pxa2x0_i2c_write_2(struct pxa2x0_i2c_softc *sc, u_char slave, u_short value) 310 { 311 bus_space_tag_t iot = sc->sc_iot; 312 bus_space_handle_t ioh = sc->sc_ioh; 313 int timeout; 314 int tries = I2C_RETRY_COUNT; 315 uint32_t rv; 316 317 retry: 318 bus_space_write_4(iot, ioh, I2C_ICR, ICR_UR); 319 bus_space_write_4(iot, ioh, I2C_ISAR, sc->sc_isar); 320 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 321 delay(1); 322 bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_SCLE); 323 324 /* Write slave device address. */ 325 bus_space_write_4(iot, ioh, I2C_IDBR, (slave<<1)); 326 rv = bus_space_read_4(iot, ioh, I2C_ICR); 327 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_START); 328 rv = bus_space_read_4(iot, ioh, I2C_ICR); 329 bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_STOP); 330 rv = bus_space_read_4(iot, ioh, I2C_ICR); 331 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_TB); 332 333 timeout = 10000; 334 while ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ITE) == 0) { 335 if (timeout-- == 0) 336 goto err; 337 delay(1); 338 } 339 if ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ACKNAK) != 0) 340 goto err; 341 342 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 343 344 /* Write upper 8 bits of data. */ 345 bus_space_write_4(iot, ioh, I2C_IDBR, (value >> 8) & 0xff); 346 rv = bus_space_read_4(iot, ioh, I2C_ICR); 347 bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_START); 348 rv = bus_space_read_4(iot, ioh, I2C_ICR); 349 bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_STOP); 350 rv = bus_space_read_4(iot, ioh, I2C_ICR); 351 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_TB); 352 353 timeout = 10000; 354 while ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ITE) == 0) { 355 if (timeout-- == 0) 356 goto err; 357 delay(1); 358 } 359 if ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ACKNAK) != 0) 360 goto err; 361 362 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 363 364 /* Write lower 8 bits of data. */ 365 bus_space_write_4(iot, ioh, I2C_IDBR, value & 0xff); 366 rv = bus_space_read_4(iot, ioh, I2C_ICR); 367 bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_START); 368 rv = bus_space_read_4(iot, ioh, I2C_ICR); 369 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_STOP); 370 rv = bus_space_read_4(iot, ioh, I2C_ICR); 371 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_TB); 372 373 timeout = 10000; 374 while ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ITE) == 0) { 375 if (timeout-- == 0) 376 goto err; 377 delay(1); 378 } 379 if ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ACKNAK) != 0) 380 goto err; 381 382 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 383 384 rv = bus_space_read_4(iot, ioh, I2C_ICR); 385 bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_STOP); 386 387 bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_BEIE | ICR_SADIE); 388 389 return 0; 390 391 err: 392 if (tries-- >= 0) 393 goto retry; 394 395 bus_space_write_4(iot, ioh, I2C_ICR, ICR_UR); 396 bus_space_write_4(iot, ioh, I2C_ISAR, sc->sc_isar); 397 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 398 bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_BEIE | ICR_SADIE); 399 400 return EIO; 401 } 402 403 /* ---------------------------------------------------------------------------- 404 * for i2c_controller 405 */ 406 407 #define CSR_READ_4(sc,r) bus_space_read_4(sc->sc_iot, sc->sc_ioh, r) 408 #define CSR_WRITE_4(sc,r,v) bus_space_write_4(sc->sc_iot, sc->sc_ioh, r, v) 409 410 #define ISR_ALL (ISR_RWM | ISR_ACKNAK | ISR_UB | ISR_IBB \ 411 | ISR_SSD | ISR_ALD | ISR_ITE | ISR_IRF \ 412 | ISR_GCAD | ISR_SAD | ISR_BED) 413 414 #define I2C_TIMEOUT 100 /* protocol timeout, in uSecs */ 415 416 void 417 pxa2x0_i2c_reset(struct pxa2x0_i2c_softc *sc) 418 { 419 420 CSR_WRITE_4(sc, I2C_ICR, ICR_UR); 421 CSR_WRITE_4(sc, I2C_ISAR, 0); 422 CSR_WRITE_4(sc, I2C_ISR, ISR_ALL); 423 while (CSR_READ_4(sc, I2C_ICR) & ~ICR_UR) 424 continue; 425 CSR_WRITE_4(sc, I2C_ICR, sc->sc_icr); 426 } 427 428 int 429 pxa2x0_i2c_wait(struct pxa2x0_i2c_softc *sc, int bit, int flags) 430 { 431 uint32_t isr; 432 int error; 433 int i; 434 435 for (i = I2C_TIMEOUT; i >= 0; --i) { 436 isr = CSR_READ_4(sc, I2C_ISR); 437 if (isr & (bit | ISR_BED)) 438 break; 439 delay(1); 440 } 441 442 if (isr & (ISR_BED | (bit & ISR_ALD))) 443 error = EIO; 444 else if (isr & (bit & ~ISR_ALD)) 445 error = 0; 446 else 447 error = ETIMEDOUT; 448 449 CSR_WRITE_4(sc, I2C_ISR, isr); 450 451 return error; 452 } 453 454 int 455 pxa2x0_i2c_send_start(struct pxa2x0_i2c_softc *sc, int flags) 456 { 457 458 CSR_WRITE_4(sc, I2C_ICR, sc->sc_icr | ICR_START); 459 delay(I2C_TIMEOUT); 460 return 0; 461 } 462 463 int 464 pxa2x0_i2c_send_stop(struct pxa2x0_i2c_softc *sc, int flags) 465 { 466 467 CSR_WRITE_4(sc, I2C_ICR, sc->sc_icr | ICR_STOP); 468 delay(I2C_TIMEOUT); 469 return 0; 470 } 471 472 int 473 pxa2x0_i2c_initiate_xfer(struct pxa2x0_i2c_softc *sc, uint16_t addr, int flags) 474 { 475 int rd_req = (flags & I2C_F_READ) ? 1 : 0; 476 int error; 477 478 if ((addr & ~0x7f) != 0) { 479 error = EINVAL; 480 goto error; 481 } 482 483 CSR_WRITE_4(sc, I2C_IDBR, (addr << 1) | rd_req); 484 CSR_WRITE_4(sc, I2C_ICR, sc->sc_icr | ICR_START | ICR_TB); 485 486 error = pxa2x0_i2c_wait(sc, ISR_ITE, flags); 487 error: 488 if (error) { 489 DPRINTF(("%s: failed to initiate %s xfer (error=%d)\n", 490 device_xname(sc->sc_dev), 491 rd_req ? "read" : "write", error)); 492 return error; 493 } 494 return 0; 495 } 496 497 int 498 pxa2x0_i2c_read_byte(struct pxa2x0_i2c_softc *sc, uint8_t *bytep, int flags) 499 { 500 int last_byte = flags & I2C_F_LAST; 501 int send_stop = flags & I2C_F_STOP; 502 int error; 503 504 CSR_WRITE_4(sc, I2C_ICR, sc->sc_icr | ICR_TB 505 | (last_byte ? ICR_ACKNAK : 0) | (send_stop ? ICR_STOP : 0)); 506 error = pxa2x0_i2c_wait(sc, ISR_IRF | ISR_ALD, flags); 507 if (error) { 508 DPRINTF(("%s: read byte failed\n", device_xname(sc->sc_dev))); 509 return error; 510 } 511 512 *bytep = CSR_READ_4(sc, I2C_IDBR); 513 return 0; 514 } 515 516 int 517 pxa2x0_i2c_write_byte(struct pxa2x0_i2c_softc *sc, uint8_t byte, int flags) 518 { 519 int send_stop = flags & I2C_F_STOP; 520 int error; 521 522 CSR_WRITE_4(sc, I2C_IDBR, byte); 523 CSR_WRITE_4(sc, I2C_ICR, sc->sc_icr | ICR_TB 524 | (send_stop ? ICR_STOP : 0)); 525 error = pxa2x0_i2c_wait(sc, ISR_ITE | ISR_ALD, flags); 526 if (error) { 527 DPRINTF(("%s: write byte failed\n", device_xname(sc->sc_dev))); 528 return error; 529 } 530 return 0; 531 } 532 533 534 int 535 pxa2x0_i2c_poll(struct pxa2x0_i2c_softc *sc, int len, char *data, int op) 536 { 537 bus_space_tag_t iot = sc->sc_iot; 538 bus_space_handle_t ioh = sc->sc_ioh; 539 uint32_t rv; 540 int timeout, tries, n = 0; 541 542 KASSERT(len > 0); 543 544 if (sc->sc_stat == PI2C_STAT_SEND) { 545 if (op != I2C_F_WRITE) 546 return 0; 547 goto send; 548 } else if (sc->sc_stat == PI2C_STAT_RECEIVE) { 549 if (op != I2C_F_READ) 550 return 0; 551 goto receive; 552 } 553 554 bus_space_write_4(iot, ioh, I2C_ISAR, sc->sc_isar); 555 bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_SADIE); 556 557 /* Poll Slave Address Detected */ 558 tries = I2C_RETRY_COUNT; 559 while (1 /*CONSTCOND*/) { 560 rv = bus_space_read_4(iot, ioh, I2C_ISR); 561 if ((rv & (ISR_SAD | ISR_UB)) == (ISR_SAD | ISR_UB)) 562 break; 563 if (--tries <= 0) 564 return 0; 565 delay(1000); /* XXXX */ 566 } 567 bus_space_write_4(iot, ioh, I2C_ISR, ISR_SAD); /* Clear SAD */ 568 569 rv = bus_space_read_4(iot, ioh, I2C_ISR); 570 if (rv & ISR_RWM) { 571 if (op != I2C_F_WRITE) 572 return 0; 573 if (rv & ISR_ACKNAK) 574 return 0; 575 576 send: 577 bus_space_write_4(iot, ioh, I2C_IDBR, data[n]); 578 579 /* Initiate the transfer */ 580 rv = bus_space_read_4(iot, ioh, I2C_ICR); 581 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_TB | ICR_ITEIE); 582 583 while (n < len - 1) { 584 timeout = 10000; 585 while (--timeout > 0) { 586 rv = bus_space_read_4(iot, ioh, I2C_ISR); 587 rv &= (ISR_ITE | ISR_ACKNAK | ISR_RWM); 588 if (rv == ISR_ITE) 589 break; 590 delay(1); 591 } 592 if (timeout == 0) 593 goto err; 594 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 595 596 n++; 597 if (n < len) 598 bus_space_write_4(iot, ioh, I2C_IDBR, data[n]); 599 600 rv = bus_space_read_4(iot, ioh, I2C_ICR); 601 bus_space_write_4(iot, ioh, I2C_ICR, 602 rv | ICR_TB | ICR_ITEIE); 603 } 604 605 timeout = 10000; 606 while (--timeout > 0) { 607 rv = bus_space_read_4(iot, ioh, I2C_ISR); 608 rv &= (ISR_ITE | ISR_ACKNAK | ISR_RWM); 609 if (rv == (ISR_ITE | ISR_ACKNAK)) 610 break; 611 delay(1); 612 } 613 if (timeout == 0) 614 goto err; 615 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 616 617 n++; 618 } else { 619 if (op != I2C_F_READ) 620 return 0; 621 622 while (n < len) { 623 rv = bus_space_read_4(iot, ioh, I2C_ICR); 624 bus_space_write_4(iot, ioh, I2C_ICR, 625 rv | ICR_TB | ICR_IRFIE); 626 627 receive: 628 timeout = 10000; 629 while (--timeout > 0) { 630 rv = bus_space_read_4(iot, ioh, I2C_ISR); 631 rv &= (ISR_IRF | ISR_ACKNAK | ISR_RWM); 632 if (rv == ISR_IRF) 633 break; 634 delay(1); 635 } 636 if (timeout == 0) 637 goto err; 638 639 data[n++] = bus_space_read_4(iot, ioh, I2C_IDBR); 640 641 bus_space_write_4(iot, ioh, I2C_ISR, ISR_IRF); 642 } 643 644 /* Release I2C bus and allow next transfer. */ 645 rv = bus_space_read_4(iot, ioh, I2C_ICR); 646 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_TB); 647 } 648 649 timeout = 10000; 650 while (--timeout > 0) { 651 rv = bus_space_read_4(iot, ioh, I2C_ISR); 652 rv &= (ISR_UB | ISR_SSD); 653 if (rv == ISR_SSD) 654 break; 655 delay(1); 656 } 657 if (timeout == 0) 658 goto err; 659 bus_space_write_4(iot, ioh, I2C_ISR, ISR_SSD); 660 661 err: 662 bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_BEIE | ICR_SADIE); 663 664 sc->sc_stat = PI2C_STAT_STOP; 665 return n; 666 } 667 668 int 669 pxa2x0_i2c_intr_sub(struct pxa2x0_i2c_softc *sc, int *len, uint8_t *buf) 670 { 671 bus_space_tag_t iot = sc->sc_iot; 672 bus_space_handle_t ioh = sc->sc_ioh; 673 int rv; 674 uint16_t isr; 675 676 isr = bus_space_read_4(iot, ioh, I2C_ISR); 677 bus_space_write_4(iot, ioh, I2C_ISR, 678 isr & (ISR_BED|ISR_SAD|ISR_IRF|ISR_ITE|ISR_ALD|ISR_SSD)); 679 680 DPRINTF(("%s: Interrupt Status 0x%x\n", __func__, isr)); 681 682 *len = 0; 683 if (isr & ISR_SAD) { /* Slave Address Detected */ 684 if (isr & ISR_RWM) 685 sc->sc_stat = PI2C_STAT_SEND; 686 else { 687 rv = bus_space_read_4(iot, ioh, I2C_ICR); 688 bus_space_write_4(iot, ioh, I2C_ICR, 689 rv | ICR_TB | ICR_IRFIE); 690 sc->sc_stat = PI2C_STAT_RECEIVE; 691 } 692 return 1; /* handled */ 693 } else if (isr & ISR_IRF) { /* IDBR Receive Full */ 694 *buf = bus_space_read_4(iot, ioh, I2C_IDBR); 695 *len = 1; 696 697 /* Next transfer start */ 698 rv = bus_space_read_4(iot, ioh, I2C_ICR); 699 bus_space_write_4(iot, ioh, I2C_ICR, 700 rv | ICR_TB | ICR_IRFIE | ICR_SSDIE); 701 return 1; /* handled */ 702 } else if (isr & ISR_SSD) { /* Slave STOP Detected */ 703 sc->sc_stat = PI2C_STAT_STOP; 704 705 bus_space_write_4(iot, ioh, I2C_ICR, 706 ICR_IUE | ICR_BEIE | ICR_SADIE); 707 return 1; /* handled */ 708 } else if (isr & ISR_BED) { /* Bus Error Detected */ 709 aprint_error_dev(sc->sc_dev, 710 "%s: Bus Error Detected\n", __func__); 711 sc->sc_stat = PI2C_STAT_ERROR; 712 return 0; /* not handled */ 713 } 714 715 sc->sc_stat = PI2C_STAT_UNKNOWN; 716 aprint_error_dev(sc->sc_dev, "Interrupt not handled 0x%x\n", isr); 717 return 0; /* not handled */ 718 } 719
Indexes created Sat Sep 20 22:09:52 GMT 2025