1 /* $NetBSD: radeon_agp.c,v 1.5 2021/12/18 23:45:43 riastradh Exp $ */ 2 3 /* 4 * Copyright 2008 Red Hat Inc. 5 * Copyright 2009 Jerome Glisse. 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a 8 * copy of this software and associated documentation files (the "Software"), 9 * to deal in the Software without restriction, including without limitation 10 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 11 * and/or sell copies of the Software, and to permit persons to whom the 12 * Software is furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 21 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 22 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 23 * OTHER DEALINGS IN THE SOFTWARE. 24 * 25 * Authors: 26 * Dave Airlie 27 * Jerome Glisse <glisse (at) freedesktop.org> 28 */ 29 30 #include <sys/cdefs.h> 31 __KERNEL_RCSID(0, "$NetBSD: radeon_agp.c,v 1.5 2021/12/18 23:45:43 riastradh Exp $"); 32 33 #include <linux/pci.h> 34 35 #include <drm/drm_agpsupport.h> 36 #include <drm/drm_device.h> 37 #include <drm/radeon_drm.h> 38 39 #include "radeon.h" 40 41 #if IS_ENABLED(CONFIG_AGP) 42 43 struct radeon_agpmode_quirk { 44 u32 hostbridge_vendor; 45 u32 hostbridge_device; 46 u32 chip_vendor; 47 u32 chip_device; 48 u32 subsys_vendor; 49 u32 subsys_device; 50 u32 default_mode; 51 }; 52 53 static struct radeon_agpmode_quirk radeon_agpmode_quirk_list[] = { 54 /* Intel E7505 Memory Controller Hub / RV350 AR [Radeon 9600XT] Needs AGPMode 4 (deb #515326) */ 55 { PCI_VENDOR_ID_INTEL, 0x2550, PCI_VENDOR_ID_ATI, 0x4152, 0x1458, 0x4038, 4}, 56 /* Intel 82865G/PE/P DRAM Controller/Host-Hub / Mobility 9800 Needs AGPMode 4 (deb #462590) */ 57 { PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x4a4e, PCI_VENDOR_ID_DELL, 0x5106, 4}, 58 /* Intel 82865G/PE/P DRAM Controller/Host-Hub / RV280 [Radeon 9200 SE] Needs AGPMode 4 (lp #300304) */ 59 { PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x5964, 60 0x148c, 0x2073, 4}, 61 /* Intel 82855PM Processor to I/O Controller / Mobility M6 LY Needs AGPMode 1 (deb #467235) */ 62 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c59, 63 PCI_VENDOR_ID_IBM, 0x052f, 1}, 64 /* Intel 82855PM host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #195051) */ 65 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e50, 66 PCI_VENDOR_ID_IBM, 0x0550, 1}, 67 /* Intel 82855PM host bridge / RV250/M9 GL [Mobility FireGL 9000/Radeon 9000] needs AGPMode 1 (Thinkpad T40p) */ 68 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c66, 69 PCI_VENDOR_ID_IBM, 0x054d, 1}, 70 /* Intel 82855PM host bridge / Mobility M7 needs AGPMode 1 */ 71 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c57, 72 PCI_VENDOR_ID_IBM, 0x0530, 1}, 73 /* Intel 82855PM host bridge / FireGL Mobility T2 RV350 Needs AGPMode 2 (fdo #20647) */ 74 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e54, 75 PCI_VENDOR_ID_IBM, 0x054f, 2}, 76 /* Intel 82855PM host bridge / Mobility M9+ / VaioPCG-V505DX Needs AGPMode 2 (fdo #17928) */ 77 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61, 78 PCI_VENDOR_ID_SONY, 0x816b, 2}, 79 /* Intel 82855PM Processor to I/O Controller / Mobility M9+ Needs AGPMode 8 (phoronix forum) */ 80 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61, 81 PCI_VENDOR_ID_SONY, 0x8195, 8}, 82 /* Intel 82830 830 Chipset Host Bridge / Mobility M6 LY Needs AGPMode 2 (fdo #17360)*/ 83 { PCI_VENDOR_ID_INTEL, 0x3575, PCI_VENDOR_ID_ATI, 0x4c59, 84 PCI_VENDOR_ID_DELL, 0x00e3, 2}, 85 /* Intel 82852/82855 host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 (lp #296617) */ 86 { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4c66, 87 PCI_VENDOR_ID_DELL, 0x0149, 1}, 88 /* Intel 82855PM host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 for suspend/resume */ 89 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c66, 90 PCI_VENDOR_ID_IBM, 0x0531, 1}, 91 /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (deb #467460) */ 92 { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, 93 0x1025, 0x0061, 1}, 94 /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #203007) */ 95 { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, 96 0x1025, 0x0064, 1}, 97 /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #141551) */ 98 { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, 99 PCI_VENDOR_ID_ASUSTEK, 0x1942, 1}, 100 /* Intel 82852/82855 host bridge / Mobility 9600/9700 Needs AGPMode 1 (deb #510208) */ 101 { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, 102 0x10cf, 0x127f, 1}, 103 /* ASRock K7VT4A+ AGP 8x / ATI Radeon 9250 AGP Needs AGPMode 4 (lp #133192) */ 104 { 0x1849, 0x3189, PCI_VENDOR_ID_ATI, 0x5960, 105 0x1787, 0x5960, 4}, 106 /* VIA K8M800 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (fdo #12544) */ 107 { PCI_VENDOR_ID_VIA, 0x0204, PCI_VENDOR_ID_ATI, 0x5960, 108 0x17af, 0x2020, 4}, 109 /* VIA KT880 Host Bridge / RV350 [Radeon 9550] Needs AGPMode 4 (fdo #19981) */ 110 { PCI_VENDOR_ID_VIA, 0x0269, PCI_VENDOR_ID_ATI, 0x4153, 111 PCI_VENDOR_ID_ASUSTEK, 0x003c, 4}, 112 /* VIA VT8363 Host Bridge / R200 QL [Radeon 8500] Needs AGPMode 2 (lp #141551) */ 113 { PCI_VENDOR_ID_VIA, 0x0305, PCI_VENDOR_ID_ATI, 0x514c, 114 PCI_VENDOR_ID_ATI, 0x013a, 2}, 115 /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 (deb #515512) */ 116 { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960, 117 PCI_VENDOR_ID_ASUSTEK, 0x004c, 2}, 118 /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 */ 119 { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960, 120 PCI_VENDOR_ID_ASUSTEK, 0x0054, 2}, 121 /* VIA VT8377 Host Bridge / R200 QM [Radeon 9100] Needs AGPMode 4 (deb #461144) */ 122 { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x514d, 123 0x174b, 0x7149, 4}, 124 /* VIA VT8377 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (lp #312693) */ 125 { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5960, 126 0x1462, 0x0380, 4}, 127 /* VIA VT8377 Host Bridge / RV280 Needs AGPMode 4 (ati ML) */ 128 { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5964, 129 0x148c, 0x2073, 4}, 130 /* ATI Host Bridge / RV280 [M9+] Needs AGPMode 1 (phoronix forum) */ 131 { PCI_VENDOR_ID_ATI, 0xcbb2, PCI_VENDOR_ID_ATI, 0x5c61, 132 PCI_VENDOR_ID_SONY, 0x8175, 1}, 133 { 0, 0, 0, 0, 0, 0, 0 }, 134 }; 135 #endif 136 137 int radeon_agp_init(struct radeon_device *rdev) 138 { 139 #if IS_ENABLED(CONFIG_AGP) 140 struct radeon_agpmode_quirk *p = radeon_agpmode_quirk_list; 141 struct drm_agp_mode mode; 142 struct drm_agp_info info; 143 uint32_t agp_status; 144 int default_mode; 145 bool is_v3; 146 int ret; 147 148 /* Acquire AGP. */ 149 ret = drm_agp_acquire(rdev->ddev); 150 if (ret) { 151 DRM_ERROR("Unable to acquire AGP: %d\n", ret); 152 return ret; 153 } 154 155 ret = drm_agp_info(rdev->ddev, &info); 156 if (ret) { 157 drm_agp_release(rdev->ddev); 158 DRM_ERROR("Unable to get AGP info: %d\n", ret); 159 return ret; 160 } 161 162 if (rdev->ddev->agp->agp_info.aki_info.ai_aperture_size >> 20 < 32) { 163 drm_agp_release(rdev->ddev); 164 dev_warn(rdev->dev, "AGP aperture too small (%zuM) " 165 "need at least 32M, disabling AGP\n", 166 rdev->ddev->agp->agp_info.aki_info.ai_aperture_size >> 20); 167 return -EINVAL; 168 } 169 170 mode.mode = info.mode; 171 /* chips with the agp to pcie bridge don't have the AGP_STATUS register 172 * Just use the whatever mode the host sets up. 173 */ 174 if (rdev->family <= CHIP_RV350) 175 agp_status = (RREG32(RADEON_AGP_STATUS) | RADEON_AGPv3_MODE) & mode.mode; 176 else 177 agp_status = mode.mode; 178 is_v3 = !!(agp_status & RADEON_AGPv3_MODE); 179 180 if (is_v3) { 181 default_mode = (agp_status & RADEON_AGPv3_8X_MODE) ? 8 : 4; 182 } else { 183 if (agp_status & RADEON_AGP_4X_MODE) { 184 default_mode = 4; 185 } else if (agp_status & RADEON_AGP_2X_MODE) { 186 default_mode = 2; 187 } else { 188 default_mode = 1; 189 } 190 } 191 192 /* Apply AGPMode Quirks */ 193 while (p && p->chip_device != 0) { 194 if (info.id_vendor == p->hostbridge_vendor && 195 info.id_device == p->hostbridge_device && 196 rdev->pdev->vendor == p->chip_vendor && 197 rdev->pdev->device == p->chip_device && 198 rdev->pdev->subsystem_vendor == p->subsys_vendor && 199 rdev->pdev->subsystem_device == p->subsys_device) { 200 default_mode = p->default_mode; 201 } 202 ++p; 203 } 204 205 if (radeon_agpmode > 0) { 206 if ((radeon_agpmode < (is_v3 ? 4 : 1)) || 207 (radeon_agpmode > (is_v3 ? 8 : 4)) || 208 (radeon_agpmode & (radeon_agpmode - 1))) { 209 DRM_ERROR("Illegal AGP Mode: %d (valid %s), leaving at %d\n", 210 radeon_agpmode, is_v3 ? "4, 8" : "1, 2, 4", 211 default_mode); 212 radeon_agpmode = default_mode; 213 } else { 214 DRM_INFO("AGP mode requested: %d\n", radeon_agpmode); 215 } 216 } else { 217 radeon_agpmode = default_mode; 218 } 219 220 mode.mode &= ~RADEON_AGP_MODE_MASK; 221 if (is_v3) { 222 switch (radeon_agpmode) { 223 case 8: 224 mode.mode |= RADEON_AGPv3_8X_MODE; 225 break; 226 case 4: 227 default: 228 mode.mode |= RADEON_AGPv3_4X_MODE; 229 break; 230 } 231 } else { 232 switch (radeon_agpmode) { 233 case 4: 234 mode.mode |= RADEON_AGP_4X_MODE; 235 break; 236 case 2: 237 mode.mode |= RADEON_AGP_2X_MODE; 238 break; 239 case 1: 240 default: 241 mode.mode |= RADEON_AGP_1X_MODE; 242 break; 243 } 244 } 245 246 mode.mode &= ~RADEON_AGP_FW_MODE; /* disable fw */ 247 ret = drm_agp_enable(rdev->ddev, mode); 248 if (ret) { 249 DRM_ERROR("Unable to enable AGP (mode = 0x%lx)\n", mode.mode); 250 drm_agp_release(rdev->ddev); 251 return ret; 252 } 253 254 rdev->mc.agp_base = rdev->ddev->agp->agp_info.aki_info.ai_aperture_base; 255 rdev->mc.gtt_size = rdev->ddev->agp->agp_info.aki_info.ai_aperture_size; 256 rdev->mc.gtt_start = rdev->mc.agp_base; 257 rdev->mc.gtt_end = rdev->mc.gtt_start + rdev->mc.gtt_size - 1; 258 dev_info(rdev->dev, "GTT: %"PRIu64"M 0x%08"PRIX64" - 0x%08"PRIX64"\n", 259 rdev->mc.gtt_size >> 20, rdev->mc.gtt_start, rdev->mc.gtt_end); 260 261 #ifdef __NetBSD__ 262 pmap_pv_track(rdev->mc.agp_base, rdev->mc.gtt_size); 263 #endif 264 265 /* workaround some hw issues */ 266 if (rdev->family < CHIP_R200) { 267 WREG32(RADEON_AGP_CNTL, RREG32(RADEON_AGP_CNTL) | 0x000e0000); 268 } 269 return 0; 270 #else 271 return 0; 272 #endif 273 } 274 275 void radeon_agp_resume(struct radeon_device *rdev) 276 { 277 #if IS_ENABLED(CONFIG_AGP) 278 int r; 279 if (rdev->flags & RADEON_IS_AGP) { 280 r = radeon_agp_init(rdev); 281 if (r) 282 dev_warn(rdev->dev, "radeon AGP reinit failed\n"); 283 } 284 #endif 285 } 286 287 void radeon_agp_fini(struct radeon_device *rdev) 288 { 289 #if IS_ENABLED(CONFIG_AGP) 290 if (rdev->ddev->agp && rdev->ddev->agp->acquired) { 291 #ifdef __NetBSD__ 292 pmap_pv_untrack(rdev->mc.agp_base, rdev->mc.gtt_size); 293 #endif 294 drm_agp_release(rdev->ddev); 295 } 296 #endif 297 } 298 299 void radeon_agp_suspend(struct radeon_device *rdev) 300 { 301 radeon_agp_fini(rdev); 302 } 303
Indexes created Mon Sep 22 10:09:38 GMT 2025