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      1 /*	$NetBSD: radeon_atombios_i2c.c,v 1.2 2021/12/18 23:45:43 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright 2011 Advanced Micro Devices, Inc.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the "Software"),
      8  * to deal in the Software without restriction, including without limitation
      9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  * and/or sell copies of the Software, and to permit persons to whom the
     11  * Software is furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice shall be included in
     14  * all copies or substantial portions of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22  * OTHER DEALINGS IN THE SOFTWARE.
     23  *
     24  * Authors: Alex Deucher
     25  *
     26  */
     27 
     28 #include <sys/cdefs.h>
     29 __KERNEL_RCSID(0, "$NetBSD: radeon_atombios_i2c.c,v 1.2 2021/12/18 23:45:43 riastradh Exp $");
     30 
     31 #include <drm/radeon_drm.h>
     32 #include "radeon.h"
     33 #include "atom.h"
     34 
     35 #define TARGET_HW_I2C_CLOCK 50
     36 
     37 /* these are a limitation of ProcessI2cChannelTransaction not the hw */
     38 #define ATOM_MAX_HW_I2C_WRITE 3
     39 #define ATOM_MAX_HW_I2C_READ  255
     40 
     41 static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan,
     42 				 u8 slave_addr, u8 flags,
     43 				 u8 *buf, int num)
     44 {
     45 	struct drm_device *dev = chan->dev;
     46 	struct radeon_device *rdev = dev->dev_private;
     47 	PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args;
     48 	int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction);
     49 	unsigned char *base;
     50 	u16 out = cpu_to_le16(0);
     51 	int r = 0;
     52 
     53 	memset(&args, 0, sizeof(args));
     54 
     55 	mutex_lock(&chan->mutex);
     56 	mutex_lock(&rdev->mode_info.atom_context->scratch_mutex);
     57 
     58 	base = (unsigned char *)rdev->mode_info.atom_context->scratch;
     59 
     60 	if (flags & HW_I2C_WRITE) {
     61 		if (num > ATOM_MAX_HW_I2C_WRITE) {
     62 			DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 3)\n", num);
     63 			r = -EINVAL;
     64 			goto done;
     65 		}
     66 		if (buf == NULL)
     67 			args.ucRegIndex = 0;
     68 		else
     69 			args.ucRegIndex = buf[0];
     70 		if (num)
     71 			num--;
     72 		if (num)
     73 			memcpy(&out, &buf[1], num);
     74 		args.lpI2CDataOut = cpu_to_le16(out);
     75 	} else {
     76 		CTASSERT(ATOM_MAX_HW_I2C_READ <
     77 		    (uintmax_t)1 << (CHAR_BIT*sizeof(num)));
     78 		args.ucRegIndex = 0;
     79 		args.lpI2CDataOut = 0;
     80 	}
     81 
     82 	args.ucFlag = flags;
     83 	args.ucI2CSpeed = TARGET_HW_I2C_CLOCK;
     84 	args.ucTransBytes = num;
     85 	args.ucSlaveAddr = slave_addr << 1;
     86 	args.ucLineNumber = chan->rec.i2c_id;
     87 
     88 	atom_execute_table_scratch_unlocked(rdev->mode_info.atom_context, index, (uint32_t *)&args);
     89 
     90 	/* error */
     91 	if (args.ucStatus != HW_ASSISTED_I2C_STATUS_SUCCESS) {
     92 		DRM_DEBUG_KMS("hw_i2c error\n");
     93 		r = -EIO;
     94 		goto done;
     95 	}
     96 
     97 	if (!(flags & HW_I2C_WRITE))
     98 		radeon_atom_copy_swap(buf, base, num, false);
     99 
    100 done:
    101 	mutex_unlock(&rdev->mode_info.atom_context->scratch_mutex);
    102 	mutex_unlock(&chan->mutex);
    103 
    104 	return r;
    105 }
    106 
    107 int radeon_atom_hw_i2c_xfer(struct i2c_adapter *i2c_adap,
    108 			    struct i2c_msg *msgs, int num)
    109 {
    110 	struct radeon_i2c_chan *i2c = i2c_get_adapdata(i2c_adap);
    111 	struct i2c_msg *p;
    112 	int i, remaining, current_count, buffer_offset, max_bytes, ret;
    113 	u8 flags;
    114 
    115 	/* check for bus probe */
    116 	p = &msgs[0];
    117 	if ((num == 1) && (p->len == 0)) {
    118 		ret = radeon_process_i2c_ch(i2c,
    119 					    p->addr, HW_I2C_WRITE,
    120 					    NULL, 0);
    121 		if (ret)
    122 			return ret;
    123 		else
    124 			return num;
    125 	}
    126 
    127 	for (i = 0; i < num; i++) {
    128 		p = &msgs[i];
    129 		remaining = p->len;
    130 		buffer_offset = 0;
    131 		/* max_bytes are a limitation of ProcessI2cChannelTransaction not the hw */
    132 		if (p->flags & I2C_M_RD) {
    133 			max_bytes = ATOM_MAX_HW_I2C_READ;
    134 			flags = HW_I2C_READ;
    135 		} else {
    136 			max_bytes = ATOM_MAX_HW_I2C_WRITE;
    137 			flags = HW_I2C_WRITE;
    138 		}
    139 		while (remaining) {
    140 			if (remaining > max_bytes)
    141 				current_count = max_bytes;
    142 			else
    143 				current_count = remaining;
    144 			ret = radeon_process_i2c_ch(i2c,
    145 						    p->addr, flags,
    146 						    &p->buf[buffer_offset], current_count);
    147 			if (ret)
    148 				return ret;
    149 			remaining -= current_count;
    150 			buffer_offset += current_count;
    151 		}
    152 	}
    153 
    154 	return num;
    155 }
    156 
    157 u32 radeon_atom_hw_i2c_func(struct i2c_adapter *adap)
    158 {
    159 	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
    160 }
    161 
    162