1 /* $NetBSD: radeon_audio.c,v 1.3 2021/12/18 23:45:43 riastradh Exp $ */ 2 3 /* 4 * Copyright 2014 Advanced Micro Devices, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: Slava Grigorev <slava.grigorev (at) amd.com> 25 */ 26 27 #include <sys/cdefs.h> 28 __KERNEL_RCSID(0, "$NetBSD: radeon_audio.c,v 1.3 2021/12/18 23:45:43 riastradh Exp $"); 29 30 #include <linux/gcd.h> 31 32 #include <drm/drm_crtc.h> 33 #include "radeon.h" 34 #include "atom.h" 35 #include "radeon_audio.h" 36 37 void r600_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, 38 u8 enable_mask); 39 void dce4_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, 40 u8 enable_mask); 41 void dce6_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, 42 u8 enable_mask); 43 u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg); 44 void dce6_endpoint_wreg(struct radeon_device *rdev, 45 u32 offset, u32 reg, u32 v); 46 void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder, 47 struct cea_sad *sads, int sad_count); 48 void evergreen_hdmi_write_sad_regs(struct drm_encoder *encoder, 49 struct cea_sad *sads, int sad_count); 50 void dce6_afmt_write_sad_regs(struct drm_encoder *encoder, 51 struct cea_sad *sads, int sad_count); 52 void dce3_2_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, 53 u8 *sadb, int sad_count); 54 void dce3_2_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, 55 u8 *sadb, int sad_count); 56 void dce4_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, 57 u8 *sadb, int sad_count); 58 void dce4_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, 59 u8 *sadb, int sad_count); 60 void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, 61 u8 *sadb, int sad_count); 62 void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, 63 u8 *sadb, int sad_count); 64 void dce4_afmt_write_latency_fields(struct drm_encoder *encoder, 65 struct drm_connector *connector, struct drm_display_mode *mode); 66 void dce6_afmt_write_latency_fields(struct drm_encoder *encoder, 67 struct drm_connector *connector, struct drm_display_mode *mode); 68 struct r600_audio_pin* r600_audio_get_pin(struct radeon_device *rdev); 69 struct r600_audio_pin* dce6_audio_get_pin(struct radeon_device *rdev); 70 void dce6_afmt_select_pin(struct drm_encoder *encoder); 71 void r600_hdmi_audio_set_dto(struct radeon_device *rdev, 72 struct radeon_crtc *crtc, unsigned int clock); 73 void dce3_2_audio_set_dto(struct radeon_device *rdev, 74 struct radeon_crtc *crtc, unsigned int clock); 75 void dce4_hdmi_audio_set_dto(struct radeon_device *rdev, 76 struct radeon_crtc *crtc, unsigned int clock); 77 void dce4_dp_audio_set_dto(struct radeon_device *rdev, 78 struct radeon_crtc *crtc, unsigned int clock); 79 void dce6_hdmi_audio_set_dto(struct radeon_device *rdev, 80 struct radeon_crtc *crtc, unsigned int clock); 81 void dce6_dp_audio_set_dto(struct radeon_device *rdev, 82 struct radeon_crtc *crtc, unsigned int clock); 83 void r600_set_avi_packet(struct radeon_device *rdev, u32 offset, 84 unsigned char *buffer, size_t size); 85 void evergreen_set_avi_packet(struct radeon_device *rdev, u32 offset, 86 unsigned char *buffer, size_t size); 87 void r600_hdmi_update_acr(struct drm_encoder *encoder, long offset, 88 const struct radeon_hdmi_acr *acr); 89 void dce3_2_hdmi_update_acr(struct drm_encoder *encoder, long offset, 90 const struct radeon_hdmi_acr *acr); 91 void evergreen_hdmi_update_acr(struct drm_encoder *encoder, long offset, 92 const struct radeon_hdmi_acr *acr); 93 void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset); 94 void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset); 95 void dce4_hdmi_set_color_depth(struct drm_encoder *encoder, 96 u32 offset, int bpc); 97 void r600_set_audio_packet(struct drm_encoder *encoder, u32 offset); 98 void dce3_2_set_audio_packet(struct drm_encoder *encoder, u32 offset); 99 void dce4_set_audio_packet(struct drm_encoder *encoder, u32 offset); 100 void r600_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); 101 void dce3_2_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); 102 void dce4_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); 103 static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder, 104 struct drm_display_mode *mode); 105 static void radeon_audio_dp_mode_set(struct drm_encoder *encoder, 106 struct drm_display_mode *mode); 107 void r600_hdmi_enable(struct drm_encoder *encoder, bool enable); 108 void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable); 109 void evergreen_dp_enable(struct drm_encoder *encoder, bool enable); 110 111 static const u32 pin_offsets[7] = 112 { 113 (0x5e00 - 0x5e00), 114 (0x5e18 - 0x5e00), 115 (0x5e30 - 0x5e00), 116 (0x5e48 - 0x5e00), 117 (0x5e60 - 0x5e00), 118 (0x5e78 - 0x5e00), 119 (0x5e90 - 0x5e00), 120 }; 121 122 static u32 radeon_audio_rreg(struct radeon_device *rdev, u32 offset, u32 reg) 123 { 124 return RREG32(reg); 125 } 126 127 static void radeon_audio_wreg(struct radeon_device *rdev, u32 offset, 128 u32 reg, u32 v) 129 { 130 WREG32(reg, v); 131 } 132 133 static struct radeon_audio_basic_funcs r600_funcs = { 134 .endpoint_rreg = radeon_audio_rreg, 135 .endpoint_wreg = radeon_audio_wreg, 136 .enable = r600_audio_enable, 137 }; 138 139 static struct radeon_audio_basic_funcs dce32_funcs = { 140 .endpoint_rreg = radeon_audio_rreg, 141 .endpoint_wreg = radeon_audio_wreg, 142 .enable = r600_audio_enable, 143 }; 144 145 static struct radeon_audio_basic_funcs dce4_funcs = { 146 .endpoint_rreg = radeon_audio_rreg, 147 .endpoint_wreg = radeon_audio_wreg, 148 .enable = dce4_audio_enable, 149 }; 150 151 static struct radeon_audio_basic_funcs dce6_funcs = { 152 .endpoint_rreg = dce6_endpoint_rreg, 153 .endpoint_wreg = dce6_endpoint_wreg, 154 .enable = dce6_audio_enable, 155 }; 156 157 static struct radeon_audio_funcs r600_hdmi_funcs = { 158 .get_pin = r600_audio_get_pin, 159 .set_dto = r600_hdmi_audio_set_dto, 160 .update_acr = r600_hdmi_update_acr, 161 .set_vbi_packet = r600_set_vbi_packet, 162 .set_avi_packet = r600_set_avi_packet, 163 .set_audio_packet = r600_set_audio_packet, 164 .set_mute = r600_set_mute, 165 .mode_set = radeon_audio_hdmi_mode_set, 166 .dpms = r600_hdmi_enable, 167 }; 168 169 static struct radeon_audio_funcs dce32_hdmi_funcs = { 170 .get_pin = r600_audio_get_pin, 171 .write_sad_regs = dce3_2_afmt_write_sad_regs, 172 .write_speaker_allocation = dce3_2_afmt_hdmi_write_speaker_allocation, 173 .set_dto = dce3_2_audio_set_dto, 174 .update_acr = dce3_2_hdmi_update_acr, 175 .set_vbi_packet = r600_set_vbi_packet, 176 .set_avi_packet = r600_set_avi_packet, 177 .set_audio_packet = dce3_2_set_audio_packet, 178 .set_mute = dce3_2_set_mute, 179 .mode_set = radeon_audio_hdmi_mode_set, 180 .dpms = r600_hdmi_enable, 181 }; 182 183 static struct radeon_audio_funcs dce32_dp_funcs = { 184 .get_pin = r600_audio_get_pin, 185 .write_sad_regs = dce3_2_afmt_write_sad_regs, 186 .write_speaker_allocation = dce3_2_afmt_dp_write_speaker_allocation, 187 .set_dto = dce3_2_audio_set_dto, 188 .set_avi_packet = r600_set_avi_packet, 189 .set_audio_packet = dce3_2_set_audio_packet, 190 }; 191 192 static struct radeon_audio_funcs dce4_hdmi_funcs = { 193 .get_pin = r600_audio_get_pin, 194 .write_sad_regs = evergreen_hdmi_write_sad_regs, 195 .write_speaker_allocation = dce4_afmt_hdmi_write_speaker_allocation, 196 .write_latency_fields = dce4_afmt_write_latency_fields, 197 .set_dto = dce4_hdmi_audio_set_dto, 198 .update_acr = evergreen_hdmi_update_acr, 199 .set_vbi_packet = dce4_set_vbi_packet, 200 .set_color_depth = dce4_hdmi_set_color_depth, 201 .set_avi_packet = evergreen_set_avi_packet, 202 .set_audio_packet = dce4_set_audio_packet, 203 .set_mute = dce4_set_mute, 204 .mode_set = radeon_audio_hdmi_mode_set, 205 .dpms = evergreen_hdmi_enable, 206 }; 207 208 static struct radeon_audio_funcs dce4_dp_funcs = { 209 .get_pin = r600_audio_get_pin, 210 .write_sad_regs = evergreen_hdmi_write_sad_regs, 211 .write_speaker_allocation = dce4_afmt_dp_write_speaker_allocation, 212 .write_latency_fields = dce4_afmt_write_latency_fields, 213 .set_dto = dce4_dp_audio_set_dto, 214 .set_avi_packet = evergreen_set_avi_packet, 215 .set_audio_packet = dce4_set_audio_packet, 216 .mode_set = radeon_audio_dp_mode_set, 217 .dpms = evergreen_dp_enable, 218 }; 219 220 static struct radeon_audio_funcs dce6_hdmi_funcs = { 221 .select_pin = dce6_afmt_select_pin, 222 .get_pin = dce6_audio_get_pin, 223 .write_sad_regs = dce6_afmt_write_sad_regs, 224 .write_speaker_allocation = dce6_afmt_hdmi_write_speaker_allocation, 225 .write_latency_fields = dce6_afmt_write_latency_fields, 226 .set_dto = dce6_hdmi_audio_set_dto, 227 .update_acr = evergreen_hdmi_update_acr, 228 .set_vbi_packet = dce4_set_vbi_packet, 229 .set_color_depth = dce4_hdmi_set_color_depth, 230 .set_avi_packet = evergreen_set_avi_packet, 231 .set_audio_packet = dce4_set_audio_packet, 232 .set_mute = dce4_set_mute, 233 .mode_set = radeon_audio_hdmi_mode_set, 234 .dpms = evergreen_hdmi_enable, 235 }; 236 237 static struct radeon_audio_funcs dce6_dp_funcs = { 238 .select_pin = dce6_afmt_select_pin, 239 .get_pin = dce6_audio_get_pin, 240 .write_sad_regs = dce6_afmt_write_sad_regs, 241 .write_speaker_allocation = dce6_afmt_dp_write_speaker_allocation, 242 .write_latency_fields = dce6_afmt_write_latency_fields, 243 .set_dto = dce6_dp_audio_set_dto, 244 .set_avi_packet = evergreen_set_avi_packet, 245 .set_audio_packet = dce4_set_audio_packet, 246 .mode_set = radeon_audio_dp_mode_set, 247 .dpms = evergreen_dp_enable, 248 }; 249 250 static void radeon_audio_enable(struct radeon_device *rdev, 251 struct r600_audio_pin *pin, u8 enable_mask) 252 { 253 struct drm_encoder *encoder; 254 struct radeon_encoder *radeon_encoder; 255 struct radeon_encoder_atom_dig *dig; 256 int pin_count = 0; 257 258 if (!pin) 259 return; 260 261 if (rdev->mode_info.mode_config_initialized) { 262 list_for_each_entry(encoder, &rdev->ddev->mode_config.encoder_list, head) { 263 if (radeon_encoder_is_digital(encoder)) { 264 radeon_encoder = to_radeon_encoder(encoder); 265 dig = radeon_encoder->enc_priv; 266 if (dig->pin == pin) 267 pin_count++; 268 } 269 } 270 271 if ((pin_count > 1) && (enable_mask == 0)) 272 return; 273 } 274 275 if (rdev->audio.funcs->enable) 276 rdev->audio.funcs->enable(rdev, pin, enable_mask); 277 } 278 279 static void radeon_audio_interface_init(struct radeon_device *rdev) 280 { 281 if (ASIC_IS_DCE6(rdev)) { 282 rdev->audio.funcs = &dce6_funcs; 283 rdev->audio.hdmi_funcs = &dce6_hdmi_funcs; 284 rdev->audio.dp_funcs = &dce6_dp_funcs; 285 } else if (ASIC_IS_DCE4(rdev)) { 286 rdev->audio.funcs = &dce4_funcs; 287 rdev->audio.hdmi_funcs = &dce4_hdmi_funcs; 288 rdev->audio.dp_funcs = &dce4_dp_funcs; 289 } else if (ASIC_IS_DCE32(rdev)) { 290 rdev->audio.funcs = &dce32_funcs; 291 rdev->audio.hdmi_funcs = &dce32_hdmi_funcs; 292 rdev->audio.dp_funcs = &dce32_dp_funcs; 293 } else { 294 rdev->audio.funcs = &r600_funcs; 295 rdev->audio.hdmi_funcs = &r600_hdmi_funcs; 296 rdev->audio.dp_funcs = NULL; 297 } 298 } 299 300 static int radeon_audio_chipset_supported(struct radeon_device *rdev) 301 { 302 return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev); 303 } 304 305 int radeon_audio_init(struct radeon_device *rdev) 306 { 307 int i; 308 309 if (!radeon_audio || !radeon_audio_chipset_supported(rdev)) 310 return 0; 311 312 rdev->audio.enabled = true; 313 314 if (ASIC_IS_DCE83(rdev)) /* KB: 2 streams, 3 endpoints */ 315 rdev->audio.num_pins = 3; 316 else if (ASIC_IS_DCE81(rdev)) /* KV: 4 streams, 7 endpoints */ 317 rdev->audio.num_pins = 7; 318 else if (ASIC_IS_DCE8(rdev)) /* BN/HW: 6 streams, 7 endpoints */ 319 rdev->audio.num_pins = 7; 320 else if (ASIC_IS_DCE64(rdev)) /* OL: 2 streams, 2 endpoints */ 321 rdev->audio.num_pins = 2; 322 else if (ASIC_IS_DCE61(rdev)) /* TN: 4 streams, 6 endpoints */ 323 rdev->audio.num_pins = 6; 324 else if (ASIC_IS_DCE6(rdev)) /* SI: 6 streams, 6 endpoints */ 325 rdev->audio.num_pins = 6; 326 else 327 rdev->audio.num_pins = 1; 328 329 for (i = 0; i < rdev->audio.num_pins; i++) { 330 rdev->audio.pin[i].channels = -1; 331 rdev->audio.pin[i].rate = -1; 332 rdev->audio.pin[i].bits_per_sample = -1; 333 rdev->audio.pin[i].status_bits = 0; 334 rdev->audio.pin[i].category_code = 0; 335 rdev->audio.pin[i].connected = false; 336 rdev->audio.pin[i].offset = pin_offsets[i]; 337 rdev->audio.pin[i].id = i; 338 } 339 340 radeon_audio_interface_init(rdev); 341 342 /* disable audio. it will be set up later */ 343 for (i = 0; i < rdev->audio.num_pins; i++) 344 radeon_audio_enable(rdev, &rdev->audio.pin[i], 0); 345 346 return 0; 347 } 348 349 u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg) 350 { 351 if (rdev->audio.funcs->endpoint_rreg) 352 return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg); 353 354 return 0; 355 } 356 357 void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset, 358 u32 reg, u32 v) 359 { 360 if (rdev->audio.funcs->endpoint_wreg) 361 rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v); 362 } 363 364 static void radeon_audio_write_sad_regs(struct drm_encoder *encoder) 365 { 366 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 367 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 368 struct cea_sad *sads; 369 int sad_count; 370 371 if (!connector) 372 return; 373 374 sad_count = drm_edid_to_sad(radeon_connector_edid(connector), &sads); 375 if (sad_count < 0) 376 DRM_ERROR("Couldn't read SADs: %d\n", sad_count); 377 if (sad_count <= 0) 378 return; 379 BUG_ON(!sads); 380 381 if (radeon_encoder->audio && radeon_encoder->audio->write_sad_regs) 382 radeon_encoder->audio->write_sad_regs(encoder, sads, sad_count); 383 384 kfree(sads); 385 } 386 387 static void radeon_audio_write_speaker_allocation(struct drm_encoder *encoder) 388 { 389 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 390 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 391 u8 *sadb = NULL; 392 int sad_count; 393 394 if (!connector) 395 return; 396 397 sad_count = drm_edid_to_speaker_allocation(radeon_connector_edid(connector), 398 &sadb); 399 if (sad_count < 0) { 400 DRM_DEBUG("Couldn't read Speaker Allocation Data Block: %d\n", 401 sad_count); 402 sad_count = 0; 403 } 404 405 if (radeon_encoder->audio && radeon_encoder->audio->write_speaker_allocation) 406 radeon_encoder->audio->write_speaker_allocation(encoder, sadb, sad_count); 407 408 kfree(sadb); 409 } 410 411 static void radeon_audio_write_latency_fields(struct drm_encoder *encoder, 412 struct drm_display_mode *mode) 413 { 414 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 415 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 416 417 if (!connector) 418 return; 419 420 if (radeon_encoder->audio && radeon_encoder->audio->write_latency_fields) 421 radeon_encoder->audio->write_latency_fields(encoder, connector, mode); 422 } 423 424 struct r600_audio_pin* radeon_audio_get_pin(struct drm_encoder *encoder) 425 { 426 struct radeon_device *rdev = encoder->dev->dev_private; 427 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 428 429 if (radeon_encoder->audio && radeon_encoder->audio->get_pin) 430 return radeon_encoder->audio->get_pin(rdev); 431 432 return NULL; 433 } 434 435 static void radeon_audio_select_pin(struct drm_encoder *encoder) 436 { 437 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 438 439 if (radeon_encoder->audio && radeon_encoder->audio->select_pin) 440 radeon_encoder->audio->select_pin(encoder); 441 } 442 443 void radeon_audio_detect(struct drm_connector *connector, 444 struct drm_encoder *encoder, 445 enum drm_connector_status status) 446 { 447 struct drm_device *dev = connector->dev; 448 struct radeon_device *rdev = dev->dev_private; 449 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 450 struct radeon_encoder_atom_dig *dig; 451 452 if (!radeon_audio_chipset_supported(rdev)) 453 return; 454 455 if (!radeon_encoder_is_digital(encoder)) 456 return; 457 458 dig = radeon_encoder->enc_priv; 459 460 if (status == connector_status_connected) { 461 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { 462 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 463 464 if (radeon_dp_getsinktype(radeon_connector) == 465 CONNECTOR_OBJECT_ID_DISPLAYPORT) 466 radeon_encoder->audio = rdev->audio.dp_funcs; 467 else 468 radeon_encoder->audio = rdev->audio.hdmi_funcs; 469 } else { 470 radeon_encoder->audio = rdev->audio.hdmi_funcs; 471 } 472 473 if (drm_detect_monitor_audio(radeon_connector_edid(connector))) { 474 if (!dig->pin) 475 dig->pin = radeon_audio_get_pin(encoder); 476 radeon_audio_enable(rdev, dig->pin, 0xf); 477 } else { 478 radeon_audio_enable(rdev, dig->pin, 0); 479 dig->pin = NULL; 480 } 481 } else { 482 radeon_audio_enable(rdev, dig->pin, 0); 483 dig->pin = NULL; 484 } 485 } 486 487 void radeon_audio_fini(struct radeon_device *rdev) 488 { 489 int i; 490 491 if (!rdev->audio.enabled) 492 return; 493 494 for (i = 0; i < rdev->audio.num_pins; i++) 495 radeon_audio_enable(rdev, &rdev->audio.pin[i], 0); 496 497 rdev->audio.enabled = false; 498 } 499 500 static void radeon_audio_set_dto(struct drm_encoder *encoder, unsigned int clock) 501 { 502 struct radeon_device *rdev = encoder->dev->dev_private; 503 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 504 struct radeon_crtc *crtc = to_radeon_crtc(encoder->crtc); 505 506 if (radeon_encoder->audio && radeon_encoder->audio->set_dto) 507 radeon_encoder->audio->set_dto(rdev, crtc, clock); 508 } 509 510 static int radeon_audio_set_avi_packet(struct drm_encoder *encoder, 511 struct drm_display_mode *mode) 512 { 513 struct radeon_device *rdev = encoder->dev->dev_private; 514 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 515 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 516 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 517 u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE]; 518 struct hdmi_avi_infoframe frame; 519 int err; 520 521 if (!connector) 522 return -EINVAL; 523 524 err = drm_hdmi_avi_infoframe_from_display_mode(&frame, connector, mode); 525 if (err < 0) { 526 DRM_ERROR("failed to setup AVI infoframe: %d\n", err); 527 return err; 528 } 529 530 if (radeon_encoder->output_csc != RADEON_OUTPUT_CSC_BYPASS) { 531 drm_hdmi_avi_infoframe_quant_range(&frame, connector, mode, 532 radeon_encoder->output_csc == RADEON_OUTPUT_CSC_TVRGB ? 533 HDMI_QUANTIZATION_RANGE_LIMITED : 534 HDMI_QUANTIZATION_RANGE_FULL); 535 } 536 537 err = hdmi_avi_infoframe_pack(&frame, buffer, sizeof(buffer)); 538 if (err < 0) { 539 DRM_ERROR("failed to pack AVI infoframe: %d\n", err); 540 return err; 541 } 542 543 if (dig && dig->afmt && radeon_encoder->audio && 544 radeon_encoder->audio->set_avi_packet) 545 radeon_encoder->audio->set_avi_packet(rdev, dig->afmt->offset, 546 buffer, sizeof(buffer)); 547 548 return 0; 549 } 550 551 /* 552 * calculate CTS and N values if they are not found in the table 553 */ 554 static void radeon_audio_calc_cts(unsigned int clock, int *CTS, int *N, int freq) 555 { 556 int n, cts; 557 unsigned long div, mul; 558 559 /* Safe, but overly large values */ 560 n = 128 * freq; 561 cts = clock * 1000; 562 563 /* Smallest valid fraction */ 564 div = gcd(n, cts); 565 566 n /= div; 567 cts /= div; 568 569 /* 570 * The optimal N is 128*freq/1000. Calculate the closest larger 571 * value that doesn't truncate any bits. 572 */ 573 mul = ((128*freq/1000) + (n-1))/n; 574 575 n *= mul; 576 cts *= mul; 577 578 /* Check that we are in spec (not always possible) */ 579 if (n < (128*freq/1500)) 580 pr_warn("Calculated ACR N value is too small. You may experience audio problems.\n"); 581 if (n > (128*freq/300)) 582 pr_warn("Calculated ACR N value is too large. You may experience audio problems.\n"); 583 584 *N = n; 585 *CTS = cts; 586 587 DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n", 588 *N, *CTS, freq); 589 } 590 591 static const struct radeon_hdmi_acr* radeon_audio_acr(unsigned int clock) 592 { 593 static struct radeon_hdmi_acr res; 594 u8 i; 595 596 static const struct radeon_hdmi_acr hdmi_predefined_acr[] = { 597 /* 32kHz 44.1kHz 48kHz */ 598 /* Clock N CTS N CTS N CTS */ 599 { 25175, 4096, 25175, 28224, 125875, 6144, 25175 }, /* 25,20/1.001 MHz */ 600 { 25200, 4096, 25200, 6272, 28000, 6144, 25200 }, /* 25.20 MHz */ 601 { 27000, 4096, 27000, 6272, 30000, 6144, 27000 }, /* 27.00 MHz */ 602 { 27027, 4096, 27027, 6272, 30030, 6144, 27027 }, /* 27.00*1.001 MHz */ 603 { 54000, 4096, 54000, 6272, 60000, 6144, 54000 }, /* 54.00 MHz */ 604 { 54054, 4096, 54054, 6272, 60060, 6144, 54054 }, /* 54.00*1.001 MHz */ 605 { 74176, 4096, 74176, 5733, 75335, 6144, 74176 }, /* 74.25/1.001 MHz */ 606 { 74250, 4096, 74250, 6272, 82500, 6144, 74250 }, /* 74.25 MHz */ 607 { 148352, 4096, 148352, 5733, 150670, 6144, 148352 }, /* 148.50/1.001 MHz */ 608 { 148500, 4096, 148500, 6272, 165000, 6144, 148500 }, /* 148.50 MHz */ 609 }; 610 611 /* Precalculated values for common clocks */ 612 for (i = 0; i < ARRAY_SIZE(hdmi_predefined_acr); i++) 613 if (hdmi_predefined_acr[i].clock == clock) 614 return &hdmi_predefined_acr[i]; 615 616 /* And odd clocks get manually calculated */ 617 radeon_audio_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000); 618 radeon_audio_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100); 619 radeon_audio_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000); 620 621 return &res; 622 } 623 624 /* 625 * update the N and CTS parameters for a given pixel clock rate 626 */ 627 static void radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock) 628 { 629 const struct radeon_hdmi_acr *acr = radeon_audio_acr(clock); 630 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 631 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 632 633 if (!dig || !dig->afmt) 634 return; 635 636 if (radeon_encoder->audio && radeon_encoder->audio->update_acr) 637 radeon_encoder->audio->update_acr(encoder, dig->afmt->offset, acr); 638 } 639 640 static void radeon_audio_set_vbi_packet(struct drm_encoder *encoder) 641 { 642 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 643 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 644 645 if (!dig || !dig->afmt) 646 return; 647 648 if (radeon_encoder->audio && radeon_encoder->audio->set_vbi_packet) 649 radeon_encoder->audio->set_vbi_packet(encoder, dig->afmt->offset); 650 } 651 652 static void radeon_hdmi_set_color_depth(struct drm_encoder *encoder) 653 { 654 int bpc = 8; 655 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 656 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 657 658 if (!dig || !dig->afmt) 659 return; 660 661 if (encoder->crtc) { 662 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); 663 bpc = radeon_crtc->bpc; 664 } 665 666 if (radeon_encoder->audio && radeon_encoder->audio->set_color_depth) 667 radeon_encoder->audio->set_color_depth(encoder, dig->afmt->offset, bpc); 668 } 669 670 static void radeon_audio_set_audio_packet(struct drm_encoder *encoder) 671 { 672 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 673 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 674 675 if (!dig || !dig->afmt) 676 return; 677 678 if (radeon_encoder->audio && radeon_encoder->audio->set_audio_packet) 679 radeon_encoder->audio->set_audio_packet(encoder, dig->afmt->offset); 680 } 681 682 static void radeon_audio_set_mute(struct drm_encoder *encoder, bool mute) 683 { 684 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 685 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 686 687 if (!dig || !dig->afmt) 688 return; 689 690 if (radeon_encoder->audio && radeon_encoder->audio->set_mute) 691 radeon_encoder->audio->set_mute(encoder, dig->afmt->offset, mute); 692 } 693 694 /* 695 * update the info frames with the data from the current display mode 696 */ 697 static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder, 698 struct drm_display_mode *mode) 699 { 700 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 701 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 702 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 703 704 if (!dig || !dig->afmt) 705 return; 706 707 if (!connector) 708 return; 709 710 if (drm_detect_monitor_audio(radeon_connector_edid(connector))) { 711 radeon_audio_set_mute(encoder, true); 712 713 radeon_audio_write_speaker_allocation(encoder); 714 radeon_audio_write_sad_regs(encoder); 715 radeon_audio_write_latency_fields(encoder, mode); 716 radeon_audio_set_dto(encoder, mode->clock); 717 radeon_audio_set_vbi_packet(encoder); 718 radeon_hdmi_set_color_depth(encoder); 719 radeon_audio_update_acr(encoder, mode->clock); 720 radeon_audio_set_audio_packet(encoder); 721 radeon_audio_select_pin(encoder); 722 723 if (radeon_audio_set_avi_packet(encoder, mode) < 0) 724 return; 725 726 radeon_audio_set_mute(encoder, false); 727 } else { 728 radeon_hdmi_set_color_depth(encoder); 729 730 if (radeon_audio_set_avi_packet(encoder, mode) < 0) 731 return; 732 } 733 } 734 735 static void radeon_audio_dp_mode_set(struct drm_encoder *encoder, 736 struct drm_display_mode *mode) 737 { 738 struct drm_device *dev = encoder->dev; 739 struct radeon_device *rdev = dev->dev_private; 740 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 741 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 742 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 743 744 if (!dig || !dig->afmt) 745 return; 746 747 if (!connector) 748 return; 749 750 if (drm_detect_monitor_audio(radeon_connector_edid(connector))) { 751 radeon_audio_write_speaker_allocation(encoder); 752 radeon_audio_write_sad_regs(encoder); 753 radeon_audio_write_latency_fields(encoder, mode); 754 radeon_audio_set_dto(encoder, rdev->clock.vco_freq * 10); 755 radeon_audio_set_audio_packet(encoder); 756 radeon_audio_select_pin(encoder); 757 758 if (radeon_audio_set_avi_packet(encoder, mode) < 0) 759 return; 760 } 761 } 762 763 void radeon_audio_mode_set(struct drm_encoder *encoder, 764 struct drm_display_mode *mode) 765 { 766 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 767 768 if (radeon_encoder->audio && radeon_encoder->audio->mode_set) 769 radeon_encoder->audio->mode_set(encoder, mode); 770 } 771 772 void radeon_audio_dpms(struct drm_encoder *encoder, int mode) 773 { 774 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 775 776 if (radeon_encoder->audio && radeon_encoder->audio->dpms) 777 radeon_encoder->audio->dpms(encoder, mode == DRM_MODE_DPMS_ON); 778 } 779 780 unsigned int radeon_audio_decode_dfs_div(unsigned int div) 781 { 782 if (div >= 8 && div < 64) 783 return (div - 8) * 25 + 200; 784 else if (div >= 64 && div < 96) 785 return (div - 64) * 50 + 1600; 786 else if (div >= 96 && div < 128) 787 return (div - 96) * 100 + 3200; 788 else 789 return 0; 790 } 791
Indexes created Sat Sep 20 22:09:52 GMT 2025