1 /* $NetBSD: radeon_drv.c,v 1.11 2021/12/18 23:45:43 riastradh Exp $ */ 2 3 /** 4 * \file radeon_drv.c 5 * ATI Radeon driver 6 * 7 * \author Gareth Hughes <gareth (at) valinux.com> 8 */ 9 10 /* 11 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 12 * All Rights Reserved. 13 * 14 * Permission is hereby granted, free of charge, to any person obtaining a 15 * copy of this software and associated documentation files (the "Software"), 16 * to deal in the Software without restriction, including without limitation 17 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 18 * and/or sell copies of the Software, and to permit persons to whom the 19 * Software is furnished to do so, subject to the following conditions: 20 * 21 * The above copyright notice and this permission notice (including the next 22 * paragraph) shall be included in all copies or substantial portions of the 23 * Software. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 26 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 27 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 28 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 29 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 30 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 31 * OTHER DEALINGS IN THE SOFTWARE. 32 */ 33 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: radeon_drv.c,v 1.11 2021/12/18 23:45:43 riastradh Exp $"); 37 38 #include <linux/compat.h> 39 #include <linux/console.h> 40 #include <linux/module.h> 41 #include <linux/pm_runtime.h> 42 #include <linux/vga_switcheroo.h> 43 #include <linux/mmu_notifier.h> 44 45 #include <drm/drm_crtc_helper.h> 46 #include <drm/drm_drv.h> 47 #include <drm/drm_fb_helper.h> 48 #include <drm/drm_file.h> 49 #include <drm/drm_gem.h> 50 #include <drm/drm_ioctl.h> 51 #include <drm/drm_pci.h> 52 #include <drm/drm_pciids.h> 53 #include <drm/drm_probe_helper.h> 54 #include <drm/drm_vblank.h> 55 #include <drm/radeon_drm.h> 56 57 #include "radeon_drv.h" 58 59 /* 60 * KMS wrapper. 61 * - 2.0.0 - initial interface 62 * - 2.1.0 - add square tiling interface 63 * - 2.2.0 - add r6xx/r7xx const buffer support 64 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs 65 * - 2.4.0 - add crtc id query 66 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen 67 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500) 68 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs 69 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query 70 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query 71 * 2.10.0 - fusion 2D tiling 72 * 2.11.0 - backend map, initial compute support for the CS checker 73 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS 74 * 2.13.0 - virtual memory support, streamout 75 * 2.14.0 - add evergreen tiling informations 76 * 2.15.0 - add max_pipes query 77 * 2.16.0 - fix evergreen 2D tiled surface calculation 78 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx 79 * 2.18.0 - r600-eg: allow "invalid" DB formats 80 * 2.19.0 - r600-eg: MSAA textures 81 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query 82 * 2.21.0 - r600-r700: FMASK and CMASK 83 * 2.22.0 - r600 only: RESOLVE_BOX allowed 84 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880 85 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures 86 * 2.25.0 - eg+: new info request for num SE and num SH 87 * 2.26.0 - r600-eg: fix htile size computation 88 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA 89 * 2.28.0 - r600-eg: Add MEM_WRITE packet support 90 * 2.29.0 - R500 FP16 color clear registers 91 * 2.30.0 - fix for FMASK texturing 92 * 2.31.0 - Add fastfb support for rs690 93 * 2.32.0 - new info request for rings working 94 * 2.33.0 - Add SI tiling mode array query 95 * 2.34.0 - Add CIK tiling mode array query 96 * 2.35.0 - Add CIK macrotile mode array query 97 * 2.36.0 - Fix CIK DCE tiling setup 98 * 2.37.0 - allow GS ring setup on r6xx/r7xx 99 * 2.38.0 - RADEON_GEM_OP (GET_INITIAL_DOMAIN, SET_INITIAL_DOMAIN), 100 * CIK: 1D and linear tiling modes contain valid PIPE_CONFIG 101 * 2.39.0 - Add INFO query for number of active CUs 102 * 2.40.0 - Add RADEON_GEM_GTT_WC/UC, flush HDP cache before submitting 103 * CS to GPU on >= r600 104 * 2.41.0 - evergreen/cayman: Add SET_BASE/DRAW_INDIRECT command parsing support 105 * 2.42.0 - Add VCE/VUI (Video Usability Information) support 106 * 2.43.0 - RADEON_INFO_GPU_RESET_COUNTER 107 * 2.44.0 - SET_APPEND_CNT packet3 support 108 * 2.45.0 - Allow setting shader registers using DMA/COPY packet3 on SI 109 * 2.46.0 - Add PFP_SYNC_ME support on evergreen 110 * 2.47.0 - Add UVD_NO_OP register support 111 * 2.48.0 - TA_CS_BC_BASE_ADDR allowed on SI 112 * 2.49.0 - DRM_RADEON_GEM_INFO ioctl returns correct vram_size/visible values 113 * 2.50.0 - Allows unaligned shader loads on CIK. (needed by OpenGL) 114 */ 115 #define KMS_DRIVER_MAJOR 2 116 #define KMS_DRIVER_MINOR 50 117 #define KMS_DRIVER_PATCHLEVEL 0 118 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); 119 void radeon_driver_unload_kms(struct drm_device *dev); 120 void radeon_driver_lastclose_kms(struct drm_device *dev); 121 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv); 122 void radeon_driver_postclose_kms(struct drm_device *dev, 123 struct drm_file *file_priv); 124 int radeon_suspend_kms(struct drm_device *dev, bool suspend, 125 bool fbcon, bool freeze); 126 int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon); 127 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, unsigned int pipe); 128 int radeon_enable_vblank_kms(struct drm_device *dev, unsigned int pipe); 129 void radeon_disable_vblank_kms(struct drm_device *dev, unsigned int pipe); 130 void radeon_driver_irq_preinstall_kms(struct drm_device *dev); 131 int radeon_driver_irq_postinstall_kms(struct drm_device *dev); 132 void radeon_driver_irq_uninstall_kms(struct drm_device *dev); 133 irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS); 134 void radeon_gem_object_free(struct drm_gem_object *obj); 135 int radeon_gem_object_open(struct drm_gem_object *obj, 136 struct drm_file *file_priv); 137 void radeon_gem_object_close(struct drm_gem_object *obj, 138 struct drm_file *file_priv); 139 struct dma_buf *radeon_gem_prime_export(struct drm_gem_object *gobj, 140 int flags); 141 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, unsigned int crtc, 142 unsigned int flags, int *vpos, int *hpos, 143 ktime_t *stime, ktime_t *etime, 144 const struct drm_display_mode *mode); 145 extern bool radeon_is_px(struct drm_device *dev); 146 extern const struct drm_ioctl_desc radeon_ioctls_kms[]; 147 extern int radeon_max_kms_ioctl; 148 #ifdef __NetBSD__ 149 int radeon_mmap_object(struct drm_device *, off_t, size_t, vm_prot_t, 150 struct uvm_object **, voff_t *, struct file *); 151 #else 152 int radeon_mmap(struct file *filp, struct vm_area_struct *vma); 153 #endif 154 int radeon_mode_dumb_mmap(struct drm_file *filp, 155 struct drm_device *dev, 156 uint32_t handle, uint64_t *offset_p); 157 int radeon_mode_dumb_create(struct drm_file *file_priv, 158 struct drm_device *dev, 159 struct drm_mode_create_dumb *args); 160 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj); 161 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev, 162 struct dma_buf_attachment *, 163 struct sg_table *sg); 164 int radeon_gem_prime_pin(struct drm_gem_object *obj); 165 void radeon_gem_prime_unpin(struct drm_gem_object *obj); 166 void *radeon_gem_prime_vmap(struct drm_gem_object *obj); 167 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr); 168 169 /* atpx handler */ 170 #if defined(CONFIG_VGA_SWITCHEROO) 171 void radeon_register_atpx_handler(void); 172 void radeon_unregister_atpx_handler(void); 173 bool radeon_has_atpx_dgpu_power_cntl(void); 174 bool radeon_is_atpx_hybrid(void); 175 #else 176 #ifndef __NetBSD__ 177 static inline void radeon_register_atpx_handler(void) {} 178 static inline void radeon_unregister_atpx_handler(void) {} 179 static inline bool radeon_has_atpx_dgpu_power_cntl(void) { return false; } 180 static inline bool radeon_is_atpx_hybrid(void) { return false; } 181 #endif 182 #endif 183 184 int radeon_no_wb; 185 int radeon_modeset = -1; 186 int radeon_dynclks = -1; 187 int radeon_r4xx_atom = 0; 188 #ifdef __powerpc__ 189 /* Default to PCI on PowerPC (fdo #95017) */ 190 int radeon_agpmode = -1; 191 #else 192 int radeon_agpmode = 0; 193 #endif 194 int radeon_vram_limit = 0; 195 int radeon_gart_size = -1; /* auto */ 196 int radeon_benchmarking = 0; 197 int radeon_testing = 0; 198 int radeon_connector_table = 0; 199 int radeon_tv = 1; 200 int radeon_audio = -1; 201 int radeon_disp_priority = 0; 202 int radeon_hw_i2c = 0; 203 int radeon_pcie_gen2 = -1; 204 int radeon_msi = -1; 205 int radeon_lockup_timeout = 10000; 206 int radeon_fastfb = 0; 207 int radeon_dpm = -1; 208 int radeon_aspm = -1; 209 int radeon_runtime_pm = -1; 210 int radeon_hard_reset = 0; 211 int radeon_vm_size = 8; 212 int radeon_vm_block_size = -1; 213 int radeon_deep_color = 0; 214 int radeon_use_pflipirq = 2; 215 int radeon_bapm = -1; 216 int radeon_backlight = -1; 217 int radeon_auxch = -1; 218 int radeon_mst = 0; 219 int radeon_uvd = 1; 220 int radeon_vce = 1; 221 222 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers"); 223 module_param_named(no_wb, radeon_no_wb, int, 0444); 224 225 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting"); 226 module_param_named(modeset, radeon_modeset, int, 0400); 227 228 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks"); 229 module_param_named(dynclks, radeon_dynclks, int, 0444); 230 231 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx"); 232 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444); 233 234 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes"); 235 module_param_named(vramlimit, radeon_vram_limit, int, 0600); 236 237 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)"); 238 module_param_named(agpmode, radeon_agpmode, int, 0444); 239 240 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)"); 241 module_param_named(gartsize, radeon_gart_size, int, 0600); 242 243 MODULE_PARM_DESC(benchmark, "Run benchmark"); 244 module_param_named(benchmark, radeon_benchmarking, int, 0444); 245 246 MODULE_PARM_DESC(test, "Run tests"); 247 module_param_named(test, radeon_testing, int, 0444); 248 249 MODULE_PARM_DESC(connector_table, "Force connector table"); 250 module_param_named(connector_table, radeon_connector_table, int, 0444); 251 252 MODULE_PARM_DESC(tv, "TV enable (0 = disable)"); 253 module_param_named(tv, radeon_tv, int, 0444); 254 255 MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)"); 256 module_param_named(audio, radeon_audio, int, 0444); 257 258 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)"); 259 module_param_named(disp_priority, radeon_disp_priority, int, 0444); 260 261 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)"); 262 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444); 263 264 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)"); 265 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444); 266 267 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)"); 268 module_param_named(msi, radeon_msi, int, 0444); 269 270 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (default 10000 = 10 seconds, 0 = disable)"); 271 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444); 272 273 MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)"); 274 module_param_named(fastfb, radeon_fastfb, int, 0444); 275 276 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)"); 277 module_param_named(dpm, radeon_dpm, int, 0444); 278 279 MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)"); 280 module_param_named(aspm, radeon_aspm, int, 0444); 281 282 MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)"); 283 module_param_named(runpm, radeon_runtime_pm, int, 0444); 284 285 MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))"); 286 module_param_named(hard_reset, radeon_hard_reset, int, 0444); 287 288 MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 4GB)"); 289 module_param_named(vm_size, radeon_vm_size, int, 0444); 290 291 MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)"); 292 module_param_named(vm_block_size, radeon_vm_block_size, int, 0444); 293 294 MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))"); 295 module_param_named(deep_color, radeon_deep_color, int, 0444); 296 297 MODULE_PARM_DESC(use_pflipirq, "Pflip irqs for pageflip completion (0 = disable, 1 = as fallback, 2 = exclusive (default))"); 298 module_param_named(use_pflipirq, radeon_use_pflipirq, int, 0444); 299 300 MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)"); 301 module_param_named(bapm, radeon_bapm, int, 0444); 302 303 MODULE_PARM_DESC(backlight, "backlight support (1 = enable, 0 = disable, -1 = auto)"); 304 module_param_named(backlight, radeon_backlight, int, 0444); 305 306 MODULE_PARM_DESC(auxch, "Use native auxch experimental support (1 = enable, 0 = disable, -1 = auto)"); 307 module_param_named(auxch, radeon_auxch, int, 0444); 308 309 MODULE_PARM_DESC(mst, "DisplayPort MST experimental support (1 = enable, 0 = disable)"); 310 module_param_named(mst, radeon_mst, int, 0444); 311 312 MODULE_PARM_DESC(uvd, "uvd enable/disable uvd support (1 = enable, 0 = disable)"); 313 module_param_named(uvd, radeon_uvd, int, 0444); 314 315 MODULE_PARM_DESC(vce, "vce enable/disable vce support (1 = enable, 0 = disable)"); 316 module_param_named(vce, radeon_vce, int, 0444); 317 318 int radeon_si_support = 1; 319 MODULE_PARM_DESC(si_support, "SI support (1 = enabled (default), 0 = disabled)"); 320 module_param_named(si_support, radeon_si_support, int, 0444); 321 322 int radeon_cik_support = 1; 323 MODULE_PARM_DESC(cik_support, "CIK support (1 = enabled (default), 0 = disabled)"); 324 module_param_named(cik_support, radeon_cik_support, int, 0444); 325 326 static struct pci_device_id pciidlist[] = { 327 radeon_PCI_IDS 328 }; 329 330 MODULE_DEVICE_TABLE(pci, pciidlist); 331 332 static struct drm_driver kms_driver; 333 334 #ifdef __NetBSD__ 335 336 struct drm_driver *const radeon_drm_driver = &kms_driver; 337 const struct pci_device_id *const radeon_device_ids = pciidlist; 338 const size_t radeon_n_device_ids = __arraycount(pciidlist); 339 340 /* XXX Kludge for the non-GEM GEM that radeon uses. */ 341 static const struct uvm_pagerops radeon_gem_uvm_ops; 342 343 #else 344 345 bool radeon_device_is_virtual(void); 346 347 static int radeon_pci_probe(struct pci_dev *pdev, 348 const struct pci_device_id *ent) 349 { 350 unsigned long flags = 0; 351 int ret; 352 353 if (!ent) 354 return -ENODEV; /* Avoid NULL-ptr deref in drm_get_pci_dev */ 355 356 flags = ent->driver_data; 357 358 if (!radeon_si_support) { 359 switch (flags & RADEON_FAMILY_MASK) { 360 case CHIP_TAHITI: 361 case CHIP_PITCAIRN: 362 case CHIP_VERDE: 363 case CHIP_OLAND: 364 case CHIP_HAINAN: 365 dev_info(&pdev->dev, 366 "SI support disabled by module param\n"); 367 return -ENODEV; 368 } 369 } 370 if (!radeon_cik_support) { 371 switch (flags & RADEON_FAMILY_MASK) { 372 case CHIP_KAVERI: 373 case CHIP_BONAIRE: 374 case CHIP_HAWAII: 375 case CHIP_KABINI: 376 case CHIP_MULLINS: 377 dev_info(&pdev->dev, 378 "CIK support disabled by module param\n"); 379 return -ENODEV; 380 } 381 } 382 383 if (vga_switcheroo_client_probe_defer(pdev)) 384 return -EPROBE_DEFER; 385 386 /* Get rid of things like offb */ 387 ret = drm_fb_helper_remove_conflicting_pci_framebuffers(pdev, "radeondrmfb"); 388 if (ret) 389 return ret; 390 391 return drm_get_pci_dev(pdev, ent, &kms_driver); 392 } 393 394 static void 395 radeon_pci_remove(struct pci_dev *pdev) 396 { 397 struct drm_device *dev = pci_get_drvdata(pdev); 398 399 drm_put_dev(dev); 400 } 401 402 static void 403 radeon_pci_shutdown(struct pci_dev *pdev) 404 { 405 /* if we are running in a VM, make sure the device 406 * torn down properly on reboot/shutdown 407 */ 408 if (radeon_device_is_virtual()) 409 radeon_pci_remove(pdev); 410 411 #ifdef CONFIG_PPC64 412 /* 413 * Some adapters need to be suspended before a 414 * shutdown occurs in order to prevent an error 415 * during kexec. 416 * Make this power specific becauase it breaks 417 * some non-power boards. 418 */ 419 radeon_suspend_kms(pci_get_drvdata(pdev), true, true, false); 420 #endif 421 } 422 423 static int radeon_pmops_suspend(struct device *dev) 424 { 425 struct drm_device *drm_dev = dev_get_drvdata(dev); 426 return radeon_suspend_kms(drm_dev, true, true, false); 427 } 428 429 static int radeon_pmops_resume(struct device *dev) 430 { 431 struct drm_device *drm_dev = dev_get_drvdata(dev); 432 433 /* GPU comes up enabled by the bios on resume */ 434 if (radeon_is_px(drm_dev)) { 435 pm_runtime_disable(dev); 436 pm_runtime_set_active(dev); 437 pm_runtime_enable(dev); 438 } 439 440 return radeon_resume_kms(drm_dev, true, true); 441 } 442 443 static int radeon_pmops_freeze(struct device *dev) 444 { 445 struct drm_device *drm_dev = dev_get_drvdata(dev); 446 return radeon_suspend_kms(drm_dev, false, true, true); 447 } 448 449 static int radeon_pmops_thaw(struct device *dev) 450 { 451 struct drm_device *drm_dev = dev_get_drvdata(dev); 452 return radeon_resume_kms(drm_dev, false, true); 453 } 454 455 static int radeon_pmops_runtime_suspend(struct device *dev) 456 { 457 struct pci_dev *pdev = to_pci_dev(dev); 458 struct drm_device *drm_dev = pci_get_drvdata(pdev); 459 int ret; 460 461 if (!radeon_is_px(drm_dev)) { 462 pm_runtime_forbid(dev); 463 return -EBUSY; 464 } 465 466 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; 467 drm_kms_helper_poll_disable(drm_dev); 468 469 ret = radeon_suspend_kms(drm_dev, false, false, false); 470 pci_save_state(pdev); 471 pci_disable_device(pdev); 472 pci_ignore_hotplug(pdev); 473 if (radeon_is_atpx_hybrid()) 474 pci_set_power_state(pdev, PCI_D3cold); 475 else if (!radeon_has_atpx_dgpu_power_cntl()) 476 pci_set_power_state(pdev, PCI_D3hot); 477 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; 478 479 return 0; 480 } 481 482 static int radeon_pmops_runtime_resume(struct device *dev) 483 { 484 struct pci_dev *pdev = to_pci_dev(dev); 485 struct drm_device *drm_dev = pci_get_drvdata(pdev); 486 int ret; 487 488 if (!radeon_is_px(drm_dev)) 489 return -EINVAL; 490 491 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; 492 493 if (radeon_is_atpx_hybrid() || 494 !radeon_has_atpx_dgpu_power_cntl()) 495 pci_set_power_state(pdev, PCI_D0); 496 pci_restore_state(pdev); 497 ret = pci_enable_device(pdev); 498 if (ret) 499 return ret; 500 pci_set_master(pdev); 501 502 ret = radeon_resume_kms(drm_dev, false, false); 503 drm_kms_helper_poll_enable(drm_dev); 504 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; 505 return 0; 506 } 507 508 static int radeon_pmops_runtime_idle(struct device *dev) 509 { 510 struct drm_device *drm_dev = dev_get_drvdata(dev); 511 struct drm_crtc *crtc; 512 513 if (!radeon_is_px(drm_dev)) { 514 pm_runtime_forbid(dev); 515 return -EBUSY; 516 } 517 518 list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) { 519 if (crtc->enabled) { 520 DRM_DEBUG_DRIVER("failing to power off - crtc active\n"); 521 return -EBUSY; 522 } 523 } 524 525 pm_runtime_mark_last_busy(dev); 526 pm_runtime_autosuspend(dev); 527 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ 528 return 1; 529 } 530 531 long radeon_drm_ioctl(struct file *filp, 532 unsigned int cmd, unsigned long arg) 533 { 534 struct drm_file *file_priv = filp->private_data; 535 struct drm_device *dev; 536 long ret; 537 dev = file_priv->minor->dev; 538 ret = pm_runtime_get_sync(dev->dev); 539 if (ret < 0) 540 return ret; 541 542 ret = drm_ioctl(filp, cmd, arg); 543 544 pm_runtime_mark_last_busy(dev->dev); 545 pm_runtime_put_autosuspend(dev->dev); 546 return ret; 547 } 548 549 #ifdef CONFIG_COMPAT 550 static long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) 551 { 552 unsigned int nr = DRM_IOCTL_NR(cmd); 553 int ret; 554 555 if (nr < DRM_COMMAND_BASE) 556 return drm_compat_ioctl(filp, cmd, arg); 557 558 ret = radeon_drm_ioctl(filp, cmd, arg); 559 560 return ret; 561 } 562 #endif 563 564 static const struct dev_pm_ops radeon_pm_ops = { 565 .suspend = radeon_pmops_suspend, 566 .resume = radeon_pmops_resume, 567 .freeze = radeon_pmops_freeze, 568 .thaw = radeon_pmops_thaw, 569 .poweroff = radeon_pmops_freeze, 570 .restore = radeon_pmops_resume, 571 .runtime_suspend = radeon_pmops_runtime_suspend, 572 .runtime_resume = radeon_pmops_runtime_resume, 573 .runtime_idle = radeon_pmops_runtime_idle, 574 }; 575 576 static const struct file_operations radeon_driver_kms_fops = { 577 .owner = THIS_MODULE, 578 .open = drm_open, 579 .release = drm_release, 580 .unlocked_ioctl = radeon_drm_ioctl, 581 .mmap = radeon_mmap, 582 .poll = drm_poll, 583 .read = drm_read, 584 #ifdef CONFIG_COMPAT 585 .compat_ioctl = radeon_kms_compat_ioctl, 586 #endif 587 }; 588 #endif /* __NetBSD__ */ 589 590 static bool 591 radeon_get_crtc_scanout_position(struct drm_device *dev, unsigned int pipe, 592 bool in_vblank_irq, int *vpos, int *hpos, 593 ktime_t *stime, ktime_t *etime, 594 const struct drm_display_mode *mode) 595 { 596 return radeon_get_crtc_scanoutpos(dev, pipe, 0, vpos, hpos, 597 stime, etime, mode); 598 } 599 600 static struct drm_driver kms_driver = { 601 .driver_features = 602 DRIVER_USE_AGP | DRIVER_GEM | DRIVER_RENDER, 603 .load = radeon_driver_load_kms, 604 .open = radeon_driver_open_kms, 605 .postclose = radeon_driver_postclose_kms, 606 .lastclose = radeon_driver_lastclose_kms, 607 .unload = radeon_driver_unload_kms, 608 .get_vblank_counter = radeon_get_vblank_counter_kms, 609 .enable_vblank = radeon_enable_vblank_kms, 610 .disable_vblank = radeon_disable_vblank_kms, 611 .get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos, 612 .get_scanout_position = radeon_get_crtc_scanout_position, 613 .irq_preinstall = radeon_driver_irq_preinstall_kms, 614 .irq_postinstall = radeon_driver_irq_postinstall_kms, 615 .irq_uninstall = radeon_driver_irq_uninstall_kms, 616 .irq_handler = radeon_driver_irq_handler_kms, 617 #ifdef __NetBSD__ 618 .request_irq = drm_pci_request_irq, 619 .free_irq = drm_pci_free_irq, 620 #endif 621 .ioctls = radeon_ioctls_kms, 622 .gem_free_object_unlocked = radeon_gem_object_free, 623 .gem_open_object = radeon_gem_object_open, 624 .gem_close_object = radeon_gem_object_close, 625 .dumb_create = radeon_mode_dumb_create, 626 .dumb_map_offset = radeon_mode_dumb_mmap, 627 #ifdef __NetBSD__ 628 .fops = NULL, 629 .mmap_object = &radeon_mmap_object, 630 .gem_uvm_ops = &radeon_gem_uvm_ops, 631 #else 632 .fops = &radeon_driver_kms_fops, 633 #endif 634 635 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 636 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 637 .gem_prime_export = radeon_gem_prime_export, 638 .gem_prime_pin = radeon_gem_prime_pin, 639 .gem_prime_unpin = radeon_gem_prime_unpin, 640 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table, 641 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table, 642 .gem_prime_vmap = radeon_gem_prime_vmap, 643 .gem_prime_vunmap = radeon_gem_prime_vunmap, 644 645 .name = DRIVER_NAME, 646 .desc = DRIVER_DESC, 647 .date = DRIVER_DATE, 648 .major = KMS_DRIVER_MAJOR, 649 .minor = KMS_DRIVER_MINOR, 650 .patchlevel = KMS_DRIVER_PATCHLEVEL, 651 }; 652 653 #ifndef __NetBSD__ 654 655 static struct drm_driver *driver; 656 static struct pci_driver *pdriver; 657 658 static struct pci_driver radeon_kms_pci_driver = { 659 .name = DRIVER_NAME, 660 .id_table = pciidlist, 661 .probe = radeon_pci_probe, 662 .remove = radeon_pci_remove, 663 .shutdown = radeon_pci_shutdown, 664 .driver.pm = &radeon_pm_ops, 665 }; 666 667 static int __init radeon_init(void) 668 { 669 if (vgacon_text_force() && radeon_modeset == -1) { 670 DRM_INFO("VGACON disable radeon kernel modesetting.\n"); 671 radeon_modeset = 0; 672 } 673 /* set to modesetting by default if not nomodeset */ 674 if (radeon_modeset == -1) 675 radeon_modeset = 1; 676 677 if (radeon_modeset == 1) { 678 DRM_INFO("radeon kernel modesetting enabled.\n"); 679 driver = &kms_driver; 680 pdriver = &radeon_kms_pci_driver; 681 driver->driver_features |= DRIVER_MODESET; 682 driver->num_ioctls = radeon_max_kms_ioctl; 683 radeon_register_atpx_handler(); 684 685 } else { 686 DRM_ERROR("No UMS support in radeon module!\n"); 687 return -EINVAL; 688 } 689 690 return pci_register_driver(pdriver); 691 } 692 693 static void __exit radeon_exit(void) 694 { 695 pci_unregister_driver(pdriver); 696 radeon_unregister_atpx_handler(); 697 mmu_notifier_synchronize(); 698 } 699 700 #endif 701 702 module_init(radeon_init); 703 module_exit(radeon_exit); 704 705 MODULE_AUTHOR(DRIVER_AUTHOR); 706 MODULE_DESCRIPTION(DRIVER_DESC); 707 MODULE_LICENSE("GPL and additional rights"); 708
Indexes created Sun Sep 21 14:09:52 GMT 2025