| /xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/ |
| radv_cs.h | 84 static inline void radeon_set_sh_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) function
95 radeon_set_sh_reg_seq(cs, reg, 1);
|
| /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/ |
| radv_cs.h | 98 radeon_set_sh_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) function
110 radeon_set_sh_reg_seq(cs, reg, 1);
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/ |
| r600_cs.h | 170 static inline void radeon_set_sh_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) function
180 radeon_set_sh_reg_seq(cs, reg, 1);
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/ |
| r600_cs.h | 170 static inline void radeon_set_sh_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) function
180 radeon_set_sh_reg_seq(cs, reg, 1);
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/ |
| si_build_pm4.h | 74 static inline void radeon_set_sh_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) function
84 radeon_set_sh_reg_seq(cs, reg, 1);
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/ |
| si_build_pm4.h | 113 #define radeon_set_sh_reg_seq(reg, num) do { \ macro
121 radeon_set_sh_reg_seq(reg, 1); \
278 radeon_set_sh_reg_seq(sh_offset, 1); \
|
