| /src/sys/dev/ic/ |
| dp83932.c | 1188 uint16_t rcr = 0; local in function:sonic_set_filter
1191 rcr |= RCR_BRD;
1194 rcr |= RCR_PRO;
1241 rcr |= RCR_AMC;
1274 CSR_WRITE(sc, SONIC_RCR, rcr);
|
| dm9000.c | 418 int rcr; local in function:dme_set_rcvfilt
420 rcr = dme_read(sc, DM9000_RCR);
421 rcr &= ~(DM9000_RCR_PRMSC | DM9000_RCR_ALL);
422 dme_write(sc, DM9000_RCR, rcr &~ DM9000_RCR_RXEN);
429 rcr |= DM9000_RCR_PRMSC;
448 rcr |= DM9000_RCR_ALL;
461 dme_write(sc, DM9000_RCR, rcr | DM9000_RCR_RXEN);
|
| /src/sys/dev/usb/ |
| if_url.c | 425 uint32_t h = 0, rcr; local in function:url_uno_mcast
432 rcr = url_csr_read_2(un, URL_RCR);
433 rcr &= ~(URL_RCR_AAP | URL_RCR_AAM | URL_RCR_AM);
440 rcr |= URL_RCR_AAM; /* ??? */
441 rcr |= URL_RCR_AAP;
451 rcr |= URL_RCR_AAM;
461 rcr |= URL_RCR_AM; /* activate mcast hash filter */
465 url_csr_write_2(un, URL_RCR, rcr);
|
| /src/sys/arch/amiga/dev/ |
| if_esreg.h | 36 volatile u_short rcr; /* Receive Control Register */ member in struct:smcregs::__anonf052b2be0108
|
| /src/sys/arch/sandpoint/stand/altboot/ |
| rge.c | 124 unsigned tcr, rcr; member in struct:local
217 l->rcr = (07 << 13) | (07 << 8) | RCR_APM;
222 CSR_WRITE_4(l, RGE_RCR, l->rcr);
|
| /src/sys/arch/evbppc/virtex/dev/ |
| if_temac.c | 582 uint32_t rcr, tcr; local in function:temac_init
596 rcr = (gmi_read_4(TEMAC_GMI_RXCF1) | GMI_RX_ENABLE) &
598 gmi_write_4(TEMAC_GMI_RXCF1, rcr);
1252 uint32_t rcr, tcr; local in function:temac_reset
1259 rcr = gmi_read_4(TEMAC_GMI_RXCF1) & ~GMI_RX_ENABLE;
1260 gmi_write_4(TEMAC_GMI_RXCF1, rcr);
|
| /src/sys/arch/arm/imx/ |
| if_enet.c | 1120 uint32_t rcr, rcr0; local in function:enet_miibus_statchg
1129 rcr0 = rcr = ENET_REG_READ(sc, ENET_RCR);
1140 rcr &= ~ENET_RCR_DRT; /* enable receive on transmit */
1143 rcr |= ENET_RCR_DRT; /* disable receive on transmit */
1159 rcr &= ~ENET_RCR_RMII_10T;
1163 rcr &= ~ENET_RCR_RMII_10T; /* 100Mbps mode */
1167 rcr |= ENET_RCR_RMII_10T; /* 10Mbps mode */
1171 rcr = rcr0;
1180 rcr |= ENET_RCR_FCE;
1182 rcr &= ~ENET_RCR_FCE
[all...] |
