| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/ |
| amdgpu_dml1_display_rq_dlg_calc.c | 1105 double refcyc_per_req_delivery_pre_l; local in function:dml1_rq_dlg_get_dlg_params
1632 refcyc_per_req_delivery_pre_l = 0.;
1739 refcyc_per_req_delivery_pre_l = get_refcyc_per_delivery(
1759 "DLG: %s: refcyc_per_req_delivery_pre_l = %3.2f",
1761 refcyc_per_req_delivery_pre_l);
1767 disp_ttu_regs->refcyc_per_req_delivery_pre_l = (unsigned int) (refcyc_per_req_delivery_pre_l
1772 ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13));
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| display_mode_structs.h | 480 unsigned int refcyc_per_req_delivery_pre_l; member in struct:_vcs_dpi_display_ttu_regs_st
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/ |
| amdgpu_display_rq_dlg_calc_20.c | 892 double refcyc_per_req_delivery_pre_l; local in function:dml20_rq_dlg_get_dlg_params
1193 refcyc_per_req_delivery_pre_l = 0.;
1288 refcyc_per_req_delivery_pre_l = get_refcyc_per_delivery(mode_lib,
1309 dml_print("DML_DLG: %s: refcyc_per_req_delivery_pre_l = %3.2f\n",
1311 refcyc_per_req_delivery_pre_l);
1316 ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13));
1530 disp_ttu_regs->refcyc_per_req_delivery_pre_l = (unsigned int) (refcyc_per_req_delivery_pre_l
|
| amdgpu_display_rq_dlg_calc_20v2.c | 892 double refcyc_per_req_delivery_pre_l; local in function:dml20v2_rq_dlg_get_dlg_params
1194 refcyc_per_req_delivery_pre_l = 0.;
1289 refcyc_per_req_delivery_pre_l = get_refcyc_per_delivery(mode_lib,
1310 dml_print("DML_DLG: %s: refcyc_per_req_delivery_pre_l = %3.2f\n",
1312 refcyc_per_req_delivery_pre_l);
1317 ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13));
1531 disp_ttu_regs->refcyc_per_req_delivery_pre_l = (unsigned int) (refcyc_per_req_delivery_pre_l
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/ |
| amdgpu_display_rq_dlg_calc_21.c | 938 double refcyc_per_req_delivery_pre_l; local in function:dml_rq_dlg_get_dlg_params
1245 refcyc_per_req_delivery_pre_l = 0.;
1348 refcyc_per_req_delivery_pre_l = get_refcyc_per_delivery(
1372 "DML_DLG: %s: refcyc_per_req_delivery_pre_l = %3.2f\n",
1374 refcyc_per_req_delivery_pre_l);
1380 ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13));
1630 disp_ttu_regs->refcyc_per_req_delivery_pre_l = (unsigned int) (refcyc_per_req_delivery_pre_l
|
