| /src/sys/arch/sh3/dev/ |
| adc.c | 123 int regoff; local in function:adc_sample_channel
133 regoff = (chan & 0x03) << 2;
134 hireg = (volatile uint8_t *)(SH7709_ADDRAH + regoff);
135 loreg = (volatile uint8_t *)(SH7709_ADDRAL + regoff);
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| /src/sys/arch/arm/broadcom/ |
| bcm53xx_idm.c | 66 static const bus_size_t regoff[] = { local in function:bcmeth_unreset
74 for (size_t idx = 0; idx < __arraycount(regoff); idx++) {
75 const bus_size_t off = regoff[idx];
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| /src/sys/arch/arm/ti/ |
| am3_prcm.c | 217 bus_size_t regoff = be32toh(cells[0]); local in function:am3_prcm_clock_decode
231 regoff += (regbase - sc->sc_regbase);
241 if (tclk->u.hwmod.reg == regoff)
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| ti_sdhc.c | 73 bus_size_t regoff; member in struct:ti_sdhc_config
85 .regoff = 0x100
89 .regoff = 0x100
181 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0 || size <= conf->regoff) {
185 addr += conf->regoff;
186 size -= conf->regoff;
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| /src/sys/dev/i2c/ |
| act8846.c | 288 uint8_t val, regoff, regmask; local in function:act8846_is_enabled
292 regoff = ACT_DCDC_CTRL_OFFSET;
295 regoff = ACT_LDO_CTRL_OFFSET;
300 error = act8846_read(sc, c->c_base + regoff, &val);
313 uint8_t val, regoff, regmask; local in function:act8846_enable
317 regoff = ACT_DCDC_CTRL_OFFSET;
320 regoff = ACT_LDO_CTRL_OFFSET;
325 if ((error = act8846_read(sc, c->c_base + regoff, &val)) != 0)
328 error = act8846_write(sc, c->c_base + regoff, val);
343 uint8_t val, regoff, regmask local in function:act8846_disable
[all...] |
| /src/sys/dev/marvell/ |
| gt.c | 751 u_int32_t cfgbits, mppbits, mppmask, regoff, r; local in function:gt_watchdog_init
780 for (regoff = GT_MPP_Control0; regoff <= GT_MPP_Control3; regoff += 4) {
799 r = gt_read(gt, regoff);
802 gt_write(gt, regoff, r);
803 aprint_normal(" mpp %#x %#x", regoff, mppbits);
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| /src/sys/arch/mips/rmi/ |
| rmixl_fmn.c | 533 u_int regoff = fmnp->fmn_stinfo[sid].si_regbase; local in function:rmixl_fmn_config_noncore
534 if (regoff != 0) {
536 regoff += RMIXL_FMN_BS_FIRST;
538 RMIXL_IOREG_WRITE(regoff, 0);
539 regoff += sizeof(uint32_t);
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| /src/sys/arch/riscv/starfive/ |
| jh7100_pinctrl.c | 129 const bus_size_t regoff = PAD_GPIO(pad_no); local in function:jh7100_padctl_rmw
135 uint32_t reg = PCTLRD4(sc, regoff);
139 PCTLWR4(sc, regoff, reg);
144 oreg, reg, regoff);
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